12:00
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--- Lunch ---
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14:00
|
ASICs
-
Christophe De La Taille
(OMEGA (FR))
(until 16:05)
|
14:00
|
Development of Front-end Electronics for LumiCal Detector in CMOS 130 nm Technology
-
Jakub Moron
(AGH University of Science and Technology (PL))
|
14:25
|
High-speed, High-resolution, Radiation-tolerant SAR ADC for Particle Physics Experiments
- Prof.
Yun Chiu
(The University of Texas at Dallas)
|
14:50
|
VMM2 - An ASIC for the New Small Wheel
-
Gianluigi De Geronimo
(Brookhaven National Laboratory (US))
|
15:15
|
A Radiation Hardened TDC with < 10 ps Resolution and Improved Recovery Time from Single Events in 40 nm CMOS
- Mr
Jeffrey Prinzie
(KU Leuven)
|
15:40
|
Design of Bandgap Reference Circuits in a 65 nm CMOS Technology for HL-LHC Applications
-
Gianluca Traversi
(Universita e INFN (IT))
|
14:00
|
Systems, Planning, Installation, Commissioning and Running Experience
-
Wesley Smith
(University of Wisconsin (US))
(until 14:50)
|
14:00
|
The High Throughput Readout Chain of the DSSC 1M Pixel Detector Operating in Pulsed Mode
- Mr
Manfred Kirchgessner
(University Heidelberg)
|
14:25
|
IPbus: A Flexible Ethernet-based Control System for xTCA Hardware
-
Tom Williams
(University of Bristol (GB))
|
14:50
|
Trigger
-
Wesley Smith
(University of Wisconsin (US))
(until 16:05)
|
14:50
|
Upgrade of the ATLAS Central Trigger for LHC Run 2
-
Kristof Schmieden
(CERN)
|
15:15
|
ATCA-based ATLAS FTK Input Interface System
-
Yasuyuki Okumura
(University of Chicago (US))
|
15:40
|
First Operation of the Level-0 Trigger of the NA62 Liquid Krypton Electromagnetic Calorimeter
-
Nicola De Simone
(Universita e INFN Roma Tor Vergata (IT))
|
16:05
|
--- Coffee break ---
|
16:30
|
Second Poster Session
-
Mitchell Franck Newcomer
(University of Pennsylvania (US))
(until 18:30)
|
16:45
|
Adaptive power supply for the gain stabilization of SiPM
-
Ivo Polak
(Acad. of Sciences of the Czech Rep. (CZ))
|
16:46
|
Architectural Improvements and Technological Enhancements for the APEnet+ Interconnect System
-
Andrea Biagioni
(INFN Rome Section)
|
16:47
|
New Approach to Preamplifier-Shaper Design
-
Eduard Atkin
(NRNU MEPHI)
|
16:49
|
Optimisation of the Front-End Electronics of Drift Tube Chambers for High-Rate Operation
-
Philipp Schwegler
(Max-Planck-Institut fuer Physik (Werner-Heisenberg-Institut) (D)
|
16:50
|
Zero Suppression Logic of the ALICE Muon Forward Tracker Pixel Chip Prototype PIXAM and Readout Electronics Development
- Dr
Christophe FLOUZAT
(CEA Centre de Saclay)
|
16:53
|
MicroTCA and AdvancedTCA Equipment Evaluation and Customization for LHC Experiments
-
Matteo Di Cosmo
(Ministere des affaires etrangeres et europeennes (FR))
|
16:54
|
Readout Electronics Upgrade on ALICE/PHOS Detector for Run 2 of LHC
- Dr
Dong Wang
(Central China Normal University)
|
16:55
|
The Readout Chain for the PANDA MVD Strip Detector
- Mr
Robert Schnell
(Justus-Liebig-Universitaet Giessen (DE))
|
16:57
|
Low-Power Clock Distribution Circuits for the Macro Pixel ASIC
-
Luigi Gaioni
(Universita e INFN (IT))
|
16:58
|
High-Resolution Time To Digital Converters for the KM3NeT Neutrino Telescope
-
David Calvo
(IFIC)
|
16:59
|
Development of GEM Electronics Board (GEB) for Triple-GEM Detectors
-
Joonas Petteri Talvitie
(Lappeenranta Univ. of Technology (FI))
|
17:00
|
Development of a FEI4 Wafer Level Stress Compensation Layer for Improvement of Thin Pixel Modules 3D Assembly
-
Gabriel Pares
(C)
|
17:01
|
MicroTCA.4 for Industry and Research โ Experiences with the Introduction of a New Crate Standard
-
Katharina Fein
(DESY)
|
17:02
|
Test Bench Development for the Radiation Hard GBTX ASIC
-
Pedro Vicente Leitao
(CERN)
|
17:03
|
Secondary Particle Acquisition System for the CERN Beam Wire Scanners upgrade
-
Jose Luis Sirvent Blasco
(University of Barcelona (ES))
|
17:04
|
The Clock and Control System for the EuXFEL 2D Detectors: Firmware and System Integration
-
Erdem Motuk
(University College London)
|
17:05
|
SET Detection and Compensation and Its Application in PLL Design
- Prof.
Jinghong Chen
(University of Houston, Texas)
|
17:06
|
A Digital Readout System for the CMS Phase I Pixel Upgrade
-
Robert Stringer
(University of Kansas (US))
|
17:07
|
Analogue Sum ASIC for L1 Trigger Decision in Cherenkov Telescopes Cameras
-
Lluรญs Freixas Coromina
(C)
|
17:08
|
Architecture of the Upgraded BCM1F Backend Electronics for Beam Conditions and Luminosity Measurement - Hardware and Firmware
-
Agnieszka Anna Zagozdzinska
(Warsaw University of Technology (PL))
|
17:10
|
The CMS HCAL FEE Control Module
-
Stephen Goadhouse
(University of Virginia (US))
|
17:11
|
Thermal Analysis of the Proto-VIPRAM2D Chip
-
Tao Zhang
(SMU)
|
17:12
|
A 12GHz Low-Jitter LC-VCO PLL in 130nm CMOS
- Prof.
Jinghong Chen
(University Of Houston, Texas)
|
17:14
|
FBCT Fast Intensity Measurement Using TRIC Cards
- Mr
Juan Carlos Allica
(CERN)
|
17:15
|
JTAG-based Remote Configuration of an FPGA Over Optical Fibers
-
Tiankuan Liu
(Southern Methodist University)
|
17:16
|
The Clock Distribution System for the ATLAS Liquid Argon Calorimeter Phase-I Upgrade Demonstrator
-
Tiankuan Liu
(Southern Methodist University)
|
17:18
|
Development of the Read-out ASIC for Muon Chambers of the CBM Experiment
-
Evgeny Malankin
(NRNU MEPhI)
|
17:19
|
Clock and Data Recovery Implementation and Testing for the Readout Control Unit 2 in ALICE TPC.
-
Christian Torgersen
(University of Bergen (NO))
|
17:20
|
The Upgrade Plans and Challenges of the ATLAS First-level Trigger Towards the HL-LHC
-
Per Olov Joakim Gradin
(Uppsala University (SE))
|
17:22
|
PEALL4: A 4-channel, 12-bit, 40-MSPS, Power Efficient and Low Latency SAR ADC
-
Fatah Rarbi
(IN2P3 / LPSC Grenoble)
|
17:23
|
The GBT-FPGA Core: Features and Challenges
-
Manoel Barros Marin
(CERN)
|
17:24
|
The ATLAS Level-1 Muon Topological Trigger Information for Run 2 of the LHC
-
Marcos Vinicius Silva Oliveira
(Juiz de Fora Federal University (BR))
|
17:25
|
A Pattern Recognition Mezzanine Based on Associative Memory and FPGA Technology for L1 Track Triggering at HL-LHC
-
Daniel Magalotti
(Universita e INFN (IT))
|
17:26
|
The VFAT3-Comm-Port : A Complete Communication Port for Front-end ASICs Intended for Use within the High Luminosity Radiation Environments of the LHC.
-
Mieczyslaw Maria Dabrowski
(Warsaw University of Technology (PL))
|
17:28
|
Depleted Monolithic Active Pixel Sensors with LF 150 nm CMOS
-
Tetsuichi Kishishita
(University of Bonn)
|
17:29
|
CMS ECAL Electronics Developments for HL-LHC
-
Magnus Hansen
(CERN)
|
17:30
|
Research and Design of the Electronics System for the Underground Dark Matter Detection Experiment in IHEP
- Dr
Jun Hu
(Institute of High Energy Physics, Chinese Academy of Sciences(IHEP,CAS))
|
17:31
|
Design and Testing of Combined GEM+CSC Trigger Algorithm Firmware for the CMS Muon Endcap System
-
Aysen Tatarinov
(Texas A & M University (US))
|
17:32
|
3D Simulation and Dopping Profile Measurements of Planar Pixel Sensors
-
Vagelis Gkougkousis
(Universite de Paris-Sud 11 (FR))
|
17:33
|
Development of a Custom On-line Ultrasonic Vapour Analyzer and Flowmeter for the ATLAS Inner Detector, with Application to Cherenkov and Gaseous Charged Particle Detectors.
- Mr
Sergey Katunin
(PNPI St Petersberg)
|
17:34
|
ProtoVIPRAM2D: Realization and Testing
-
Tiehui Ted Liu
(Fermi National Accelerator Lab. (US))
|
17:35
|
Demonstrator System for the Phase-I Upgrade of the Trigger Readout Electronics of the ATLAS Liquid-Argon Calorimeters
-
Jasmin Fragnaud
(Centre National de la Recherche Scientifique (FR))
|
17:55
|
NaNet: a Configurable NIC Bridging the Gap Between HPC and Real-time HEP GPU Computing
-
Alessandro Lonardo
(Universita e INFN, Roma I (IT))
|
18:45
|
--- Group Photo and Conference Dinner ---
|