September 28, 2015 to October 2, 2015
Europe/Zurich timezone

The Giga Bit Transceiver based Expandable Front-End (GEFE) - a new radiation tolerant acquisition system for beam instrumentation

Sep 29, 2015, 4:56 PM
Hall of Civil Engineering (Lisbon)

Hall of Civil Engineering


IST (Instituto Superior Técnico ) Alameda Campus Av. Rovisco Pais, 1 1049-001 Lisboa Portugal
Poster Systems Poster


Manoel Barros Marin (CERN)


The Giga Bit Transceiver based Expandable Front-End (GEFE) is a multipurpose FPGA-based radiation tolerant card. It is foreseen to be the new standard FMC carrier for digital front-end applications in the CERN BE-BI group. Its intended use ranges from fast data acquisition systems to slow control installed close to the beamlines, in a radioactive environment exposed to total ionizing doses of up to 600 Gy. This paper introduces the architecture of the GEFE, its features as well as examples of its application in different setups.


The GEFE takes advantage of the Giga Bit Transceiver (GBT)/Versatile Link platform developed by the CERN PH-ESE group. This provides a radiation hard, high-speed (4.8Gbps), bidirectional, optical link for communication with back-end electronics, and multiple low-speed (40@80MHz, 20@160MHz or 10@320MHz) electrical links (e-links) for communication with digital front-end electronics. The link can be fixed and deterministic in clock phase and data latency if required. In addition to the high-speed optical link, the GEFE features a custom Electrical Serial Link Transceiver (ESLT) to be used in low-speed communications over copper cable through long distances (tested up to 2km). In order to maximize the versatility, the GEFE is expanded with dedicated front-end cards through a High-Pin Count FPGA Mezzanine Card (FMC HPC) connector which features up to 160 user-specific I/Os (that can be configured both as single-ended or differential pairs) as well as 4 differential clock inputs and 2 differential bidirectional clocks. The high-speed lines (DP) of the FMC HPC connector are used as user-specific I/Os and can also be used for special functions (this configuration does not comply with the FMC standard). In addition to the FMC HPC connector, the GEFE offers 3 general purpose low-pin count connectors. All three present the same form-factor, though two of them feature 13 noise shielded user-specific I/Os (where 4 of these I/Os may be directly connected to the FMC HPC), whilst the third connector features 24 user-specific I/Os. The interface between the e-links and the digital front-end electronics connected to the FMC HPC and/or the three general purpose connectors, as well as the control of the different on-board resources (e.g. LEDs, etc.) is carried out by a Microsemi ProAsic3, a flash-based FPGA that has been qualified for operating in radioactive environments. All other components are also qualified for use in high radiation environments. The use of an FPGA, coupled with flexible powering and clocking schemes, provides the capability to adapt the GEFE for interfacing to the user’s systems. This paper introduces the architecture of the GEFE, its features as well as examples of its application in different setups. The variety of optical and electrical interfaces on the board, coupled with its flexible architecture, mean that it can easily be adapted for use in many different applications where radiation tolerance is a requirement. A first prototype of the GEFE is expected to be available in June 2015.

Primary author


Andrea Boccardi (CERN) Christophe Donat Godichal (Institut Superieur Industriel de Bruxelles (BE)) Jose Luis Gonzalez (CERN) Thibaut Lefevre (CERN)

Presentation materials