Hans Krueger
(University of Bonn)
02/10/2015, 09:45
Plenary
For the Phase II Upgrade of both ATLAS and CMS experiments, a new pixel read-out chip needs to be developed to meet the requirements in terms of spatial resolution, data rate, and radiation tolerance. The RD53 research collaboration will develop a large area mixed signal ASIC in a 65nm CMOS technology. Special working groups focus on major design tasks like radiation tolerant design, top-level...
Steven Redant
(imec)
02/10/2015, 10:10
Plenary
Imec has been developing radiation hardened-by-design libraries with additional functionality using different CMOS technologies (.18 UMC and beyond). These DARE (Design Against Radiation Effects) platforms allow re-use, lower development times and risk of the design of circuits that need to withstand radiation. The paper gives an overview of the currently available platforms and their metrics...
Marek Palka
(Jagiellonian University (PL))
02/10/2015, 11:00
Plenary
In 2015 the LHC will operate with a higher center-of-mass energy and proton beams luminosity. To keep a high trigger efficiency against an increased
event rate, part of ATLAS Level-1 Calorimeter Trigger electronics have been re-designed or newly introduced (Pre-Processors, Merging Modules and Topological Processors). Additionally, to achieve the best possible resolution for the...
Ben Kreis
(Fermi National Accelerator Lab. (US))
02/10/2015, 11:25
Plenary
The CMS Level-1 calorimeter trigger is being upgraded in two stages to maintain performance as the LHC increases beam energy and instantaneous luminosity. In the first stage, improved algorithms including event by event pileup corrections are used. In the second stage, higher granularity inputs and a time-multiplexed approach allow for improved position and energy resolution. Data processing...
