12–16 Sept 2005
Heidelberg
Europe/Zurich timezone

CMS ECAL Front-End boards: the XFEST project

15 Sept 2005, 14:50
25m
Heidelberg

Heidelberg

Germany

Speaker

Caroline Collard (LLR Ecole Polytechnique)

Description

The Front-End (FE) boards are part of the on-detector electronics system of the CMS electromagnetic calorimeter ECAL. Their numerical functionalities and properties are tested by a dedicated test bench located at Laboratoire Leprince-Ringuet, prior to the board integration in the CMS detector at CERN. XFEST, acronym for eXtended Front-End System Test, is designed to perform tests that can last several hours, on up to 12 FE boards in parallel. The system is foreseen to deliver 80 tested boards per week. This contribution presents the XFEST set-up and the results of the measurements on FE boards.

Summary

XFEST is a test bench designed to control the FE boards production after the
burn-in phase. Its basic idea is to inject realistic 14-bits digital patterns into
several boards in parallel at a 40 MHz clock frequency and to compare their outputs
to the ones of a "reference".

XFEST is organized in three main subsystems:
- The pattern generator used to inject the signals to the FE boards is an old
prototype of FE board working in a reverse mode (producing 25 outputs in
place of inputs), in which FPGAs have been reprogrammed for this purpose
(more details are given by another contribution to this conference).
- The data corresponding to 25 channels are then distributed to four FE boards
positioned on a XFEST motherboard. The different boards are linked through
a token ring, providing the clock and the trigger information. In order to test
a large number of FE boards during a sufficient time (10^12 different patterns
are compared per hour), we consider for the final production test the possibility
to use three motherboards.
- The two optical outputs (trigger and data streams) of the FE boards are sent
to the TCC-24 board, which is a prototype of the Trigger Concentrator Card
(TCC) developed at Laboratoire Leprince-Ringuet. This prototype used as a
comparator for this project can treat 2x12 input channels, which allows to test
up to 12 FE boards simultaneously. Any discrepancy at the bit level between one
or several boards and the reference increments the error counters.
A user web interface allows the control of the whole test bench. In a first
phase, the results of the TCC comparisons are checked with ChipScope; in a
second phase, it will be done via a VME interface.

This contribution will describe the system and report the results of the
measurements as well as mention the encountered problems.

Author

Caroline Collard (LLR Ecole Polytechnique)

Co-authors

Mr Akli Karar (LLR Ecole Polytechnique) Mr Alain Debraine (LLR Ecole Polytechnique) Mr David Decotigny (LLR Ecole Polytechnique) Mr Ludwik Dobrzynski (LLR Ecole Polytechnique) Mr Nicolas Regnault (LLR Ecole Polytechnique) Mr Philippe Busson (LLR Ecole Polytechnique) Mr Thierry Romanteau (LLR Ecole Polytechnique)

Presentation materials