21–25 Sept 2009
Institut des Cordeliers 15, rue de l'Ecole de Médecine (Métro Odéon) Paris, France
Europe/Paris timezone
<strong>The deadline for paper submission has been extended to 23 October 2009</strong>

Low Power SoC Design

24 Sept 2009, 14:15
45m
Institut des Cordeliers 15, rue de l'Ecole de Médecine (Métro Odéon) Paris, France

Institut des Cordeliers 15, rue de l'Ecole de Médecine (Métro Odéon) Paris, France

Oral Topical Session: Low power designs for chips, boards and systems TOPICAL

Speaker

Christian Piguet (Centre suisse d'Electronique et de Microtechnique SA)

Description

The design of Systems-on-Chip (SoC) in very deep submicron technologies becomes a very complex task that has to bridge very high level system description to low level consideration due to technology defaults and variations. This talk will describe some of these low level main issues, such as dynamic and static power consumption, temperature, technology variations, interconnect, DFM, reliability and yield, and their impact on high-level design, such as the design of multi-Vdd, fault-tolerant, redundant or adaptive chip architectures. Low power SoC designed by CSEM will be presented for applications in three domains: wireless sensor networks, vision sensors and mobile TV.

Primary author

Christian Piguet (Centre suisse d'Electronique et de Microtechnique SA)

Presentation materials