10–14 Oct 2016
San Francisco Marriott Marquis
America/Los_Angeles timezone

HEP Track Finding with the Micron Automata Processor and Comparison with an FPGA-based Solution

13 Oct 2016, 14:30
15m
Sierra A (San Francisco Mariott Marquis)

Sierra A

San Francisco Mariott Marquis

Oral Track 1: Online Computing Track 1: Online Computing

Speaker

John Freeman (Fermi National Accelerator Lab. (US))

Description

Moore’s Law has defied our expectations and remained relevant in the semiconductor industry in the past 50 years, but many believe it is only a matter of time before an insurmountable technical barrier brings about its eventual demise. Many in the computing industry are now developing post-Moore’s Law processing solutions based on new and novel architectures. An example is the Micron Automata Processor (AP) which uses a non-von Neumann architecture based on the hardware realization of Non-deterministic Finite Automata. Although it is a dedicated pattern search engine designed primarily for text-based searches in the Internet search industry, the AP is also suitable for pattern recognition applications in HEP such as track finding. We describe our work in demonstrating a proof-of-concept for the suitability of the AP in HEP track finding applications. We compare our AP-based approach with a similar one based on Content-Addressable Memories on an FPGA. Pros and cons of each approach are considered and compared based on processing performance and ease of implementation.

Primary Keyword (Mandatory) Trigger
Secondary Keyword (Optional) Reconstruction
Tertiary Keyword (Optional) Processor architectures

Author

Michael Wang (Fermi National Accelerator Lab. (US))

Co-authors

Christopher Green (Department of Physics) Ted Zmuda (Fermilab) Tiehui Ted Liu (Fermi National Accelerator Lab. (US)) gustavo cancelo (fermilab)

Presentation materials