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CMS ECAL VFE phase II upgrade workshop

11–13 May 2016
CEA-Saclay INSTN
Europe/Zurich timezone

Contribution List

18 out of 18 displayed
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  1. 1. Welcome and Practical Details
    marc besancon (cea-saclay/dapnia/spp)
    12/05/2016, 09:00
  2. 2. Goals of the workshop
    Colin Jessop (University of Notre Dame (US))
    12/05/2016, 09:20
  3. 3. Overall Design and technical questions to answer
    Marc Dejardin (CEA/IRFU,Centre d'etude de Saclay Gif-sur-Yvette (FR))
    12/05/2016, 09:40
  4. 4. Engineering considerations
    Magnus Hansen (CERN)
    12/05/2016, 10:10
  5. 5. VFE ASIC technical requirements
    Marc Dejardin (CEA/IRFU,Centre d'etude de Saclay Gif-sur-Yvette (FR))
    12/05/2016, 14:00
  6. 6. TIA
    Pascal Baron (CEA/IRFU,Centre d'etude de Saclay Gif-sur-Yvette (FR))
    12/05/2016, 15:00
  7. 17. ADC requirements and plans
    Joao Varela (LIP Laboratorio de Instrumentacao e Fisica Experimental de Part)
    12/05/2016, 15:40
  8. 8. QIE
    Jim Hirschauer (Fermi National Accelerator Lab. (US))
    12/05/2016, 16:50
  9. 9. Discussion
    12/05/2016, 17:30
  10. 21. MPGA++
    Stephen Thomas (STFC - Rutherford Appleton Lab. (GB))
    13/05/2016, 09:00
  11. 11. LVR Overview and interface to VFE
    Werner Lustermann (Eidgenoessische Tech. Hochschule Zuerich (CH))
    13/05/2016, 09:45
  12. 16. Tests of DC-DC converters
    Patrizia Barria (University of Virginia (US))
    13/05/2016, 10:10
  13. 12. VFE Board Design and Layout considerations
    Werner Lustermann (Eidgenoessische Tech. Hochschule Zuerich (CH))
    13/05/2016, 11:00
  14. 13. VFE interface to FE considerations
    Alexander Singovski (University of Minnesota (US)), Alexandre Dolgopolov (Fermi National Accelerator Lab. (US))
    13/05/2016, 11:20
  15. 18. Off detector electronics considerations
    Bob Hirosky (University of Virginia (US))
    13/05/2016, 11:40
  16. 14. Implications of fast timing to VFE board design
    Francesco Micheli (Eidgenoessische Tech. Hochschule Zuerich (ETH))
    13/05/2016, 12:00
  17. 15. Testbeam status and planning
    Alexander Singovski (University of Minnesota (US))
    13/05/2016, 12:20
  18. 20. MPGA++
    Stephen Thomas (STFC - Rutherford Appleton Lab. (GB))