|
09:00
|
MPGA++
-
Stephen Thomas
(STFC - Rutherford Appleton Lab. (GB))
(112)
|
|
09:00
|
Other VFE design aspects (ADC/LVR/FE)
-
Werner Lustermann
(Eidgenoessische Tech. Hochschule Zuerich (CH))
(until 12:50)
(112)
|
|
09:45
|
LVR Overview and interface to VFE
-
Werner Lustermann
(Eidgenoessische Tech. Hochschule Zuerich (CH))
(112)
|
|
10:10
|
Tests of DC-DC converters
-
Patrizia Barria
(University of Virginia (US))
(112)
|
|
10:30
|
--- Coffee/Discussion ---
|
|
11:00
|
VFE Board Design and Layout considerations
-
Werner Lustermann
(Eidgenoessische Tech. Hochschule Zuerich (CH))
(112)
|
|
11:20
|
VFE interface to FE considerations
-
Alexander Singovski
(University of Minnesota (US))
Alexandre Dolgopolov
(Fermi National Accelerator Lab. (US))
(112)
|
|
11:40
|
Off detector electronics considerations
-
Bob Hirosky
(University of Virginia (US))
(112)
|
|
12:00
|
Implications of fast timing to VFE board design
-
Francesco Micheli
(Eidgenoessische Tech. Hochschule Zuerich (ETH))
(112)
|
|
12:20
|
Testbeam status and planning
-
Alexander Singovski
(University of Minnesota (US))
(112)
|
