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CMS ECAL VFE phase II upgrade workshop

11–13 May 2016
CEA-Saclay INSTN
Europe/Zurich timezone

Session

Other VFE design aspects (ADC/LVR/FE)

13 May 2016, 09:00
112 (CEA-Saclay INSTN)

112

CEA-Saclay INSTN

Conveners

Other VFE design aspects (ADC/LVR/FE)

  • Werner Lustermann (Eidgenoessische Tech. Hochschule Zuerich (CH))

Presentation materials

There are no materials yet.

  1. 11. LVR Overview and interface to VFE
    Werner Lustermann (Eidgenoessische Tech. Hochschule Zuerich (CH))
    13/05/2016, 09:45
  2. 16. Tests of DC-DC converters
    Patrizia Barria (University of Virginia (US))
    13/05/2016, 10:10
  3. 12. VFE Board Design and Layout considerations
    Werner Lustermann (Eidgenoessische Tech. Hochschule Zuerich (CH))
    13/05/2016, 11:00
  4. 13. VFE interface to FE considerations
    Alexander Singovski (University of Minnesota (US)), Alexandre Dolgopolov (Fermi National Accelerator Lab. (US))
    13/05/2016, 11:20
  5. 18. Off detector electronics considerations
    Bob Hirosky (University of Virginia (US))
    13/05/2016, 11:40
  6. 14. Implications of fast timing to VFE board design
    Francesco Micheli (Eidgenoessische Tech. Hochschule Zuerich (ETH))
    13/05/2016, 12:00
  7. 15. Testbeam status and planning
    Alexander Singovski (University of Minnesota (US))
    13/05/2016, 12:20
Building timetable...