Optimization of bias rail implementations for segmented silicon sensors

10 Dec 2017, 20:07
1m
Conference Center (Okinawa Institute of Science and Technology Graduate University (OIST))

Conference Center

Okinawa Institute of Science and Technology Graduate University (OIST)

OIST, Onna, Okinawa 904-0495, Japan
POSTER Simulations POSTER

Speaker

Daniel Schell (KIT - Karlsruhe Institute of Technology (DE))

Description

Bias rails are fundamental design features of segmented strip as well as pixelated silicon sensors in order to distribute the ground potential from the bias ring to the implants.
In case of AC coupled strip sensors, grounding the implants through the bias rail is essential to deplete the bulk during testing and operation.
Since DC coupled sensors are usually grounded through the virtual ground potential of their readout chip, bias rails open up the possibility to ground and test the sensor before assembly.
However, adding the bias rail is always accompanied with a certain degree of efficiency loss and modification of the electric field in that region which could result in an early breakdown of the sensor.

TCAD simulations provide a deeper insight into how electric fields in the bias rail region evolve and how charge is collected.
Varying parameters like strip isolation or the bias rail implementation itself, leads to an even better understanding of how the performance of silicon sensors depend on the chosen design parameters.

This contribution summarizes an extensive simulation study searching for an
optimal set of design parameters to minimize the breakdown voltage and maximize
the charge collection efficiency.
The results are complemented with test beam measurements performed at the
DESY test beam facility in Hamburg, Germany.

Primary author

Daniel Schell (KIT - Karlsruhe Institute of Technology (DE))

Presentation materials