A monolithic mid-infrared image sensor with SOI technology

10 Dec 2017, 21:31
1m
Conference Center (Okinawa Institute of Science and Technology Graduate University (OIST))

Conference Center

Okinawa Institute of Science and Technology Graduate University (OIST)

OIST, Onna, Okinawa 904-0495, Japan
POSTER SOI detectors POSTER

Speaker

Dr Takehiko Wada (ISAS/JAXA)

Description

Conventional mid-infrared (MIR) image sensors consist of infrared sensitive detector and readout integrated circuit (ROIC) with pixel-to-pixel interconnection such as Indium bump. This hybrid architecture provide us choices of sensor materials while the size of pixel and the amount of stray capacitance are limited by the hybridization. Here we propose a monolithic mid-infrared image sensor by the silicon-on-insulator monolithic pixel detector technology (SOIPIX). The detection of the infrared photon is done by the shallow energy band gap of the buried impurity doping in the high-purity handle wafer. Direct via connection to the top silicon ROIC will realize smaller pixel size and stray capacitance compared with those of hybrid sensors. Together with the native cryogenic operation of FD-SOI CMOS, the monolithic MIR image sensor will provide us fast and low-noise imaging with full-advantages of the CMOS ROIC in the mid-infrared wavelength.

Primary author

Dr Takehiko Wada (ISAS/JAXA)

Co-authors

Dr Koichi Nagase (ISAS/JAXA) Prof. Yasuo Arai (High Energy Accelerator Research Organization (JP))

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