11th International "Hiroshima" Symposium on the Development and Application of Semiconductor Tracking Detectors (HSTD11) in conjunction with 2nd Workshop on SOI Pixel Detectors (SOIPIX2017) at OIST, Okinawa, Japan

R&D status of SOI based pixel detector with 3D stacking readout

10 Dec 2017, 21:32

1m

Conference Center (Okinawa Institute of Science and Technology Graduate University (OIST))

POSTER SOI detectors POSTER

Speaker

Toru Tsuboyama (KEK, High Energy Accelerator Research Organization)

Description

We have been developing pixel detectors based on the silicon-on-insulator (SOI) technology for the particle tracking. SOI sensor technology provides ideal monolithic pixel detector thanks of fully-depleted sensor wafer integrated with high performance CMOS readout circuit. The "Sofist1" pixel sensor with 20$\mu$m$ \times $20$ \mu $m pixel size has been tested successfully. One remaining issue is to improve the read out circuit tolerable for the high-luminosity collider environment. Recently, we introduced a new 3D stacking method to the SOI sensor, Sofist4, where a comparator and 3-stage charge and time memory cells are integrated in individual 25$\mu$m$ \times$25$\mu$m pixel. In this presentation, the design and expected performance as well as the future plans will be presented.

Authors:
Toru Tsuboyama, Shun Ono, Miho Yamada, Yasuo Arai, Manabu Togawa, Ikuo Kurachi, Kazuhiko Hara, Yoichi Ikegami, Akimasa Isikawa