Speaker
Description
In the recent development of pixel detector for the inner part of ATLAS detector upgrade of the High Luminosity LHC, thin planar pixel detector has been developed. To reduce hit occupancy, pixel size is smaller than currently operating pixel detector in ATLAS and the 2 options, 50um x 50um and 25um and 100um, are considered by the same 50um x 50um pitch readout ASIC. To evaluate the performace of the fine pixel detector, two ways are tested, a) emulated by current ASIC (FE-I4) using un-uniform size of pixel, where two 50um x 250um pixels are splitted to 50um x 50um and 50um x 450um, b) used new ASIC (FE65p2) with full 50um x 50um pitch. The FE65p2 is the prototype ASIC produced by TSMC using 65nm CMOS process while this expected lower noise than FE-I4. In this presentation, basic performance and testbeam results before and after irradiation are presented.
