22–26 May 2017
Temple University - Philadelphia
US/Eastern timezone

VMM3, an ASIC for Micropattern Detectors

23 May 2017, 15:16
4m
Morgan Hall D301 (Temple University - Philadelphia)

Morgan Hall D301

Temple University - Philadelphia

Morgan Hall, 1398 Cecil B. Moore Ave., Philadelphia, PA 19122, USA

Speaker

George Iakovidis (Brookhaven National Laboratory (US))

Description

The VMM is a System on Chip (SoC) custom Application Specific Integrated Circuit (ASIC). It is intended to be used in the front end readout electronics of both Micromegas and sTGC detectors of the ATLAS Muon New Small Wheels upgrade. Due to its highly configurable parameters it can be used in a variety of tracking detectors. It is fabricated in the 130nm Global Foundries 8RF-DM process. The ASIC integrates 64 channels, each providing charge amplification, discrimination, neighbour logic, amplitude and timing measurements, analog-to-digital conversions, and either direct output for trigger or multiplexed readout within a data-driven readout system. The front-end amplifier can operate with a wide range of input capacitances, has adjustable polarity, gain and peaking time. The VMM3 is the third version of the VMM ASIC family fabricated in 2016. It has been tested on resistive Micromegas and sTGC prototypes in test beam campaigns at CERN. The specification and performance of the VMM3 as a pre-production stage will be presented as well as its performance on Micromegas detectors.

Presentation materials