Speaker
Mr
Sanjoy Mukherjee
(Bose Institute)
Description
This paper presents the latest results of performance evaluation of PCIe based DMA engines using advanced Altera Arria X FPGA for the ALICE readout card upgrade.The new card, called CRU, will read out most of the sub-detectors data, process it and store it in the server memory through DMA.The main goal of this paper is to explain the descriptors management of DMA controller such that max DMA performance can be achieved.The DMA performance has been evaluated on various server grade machines using Altera Arria X FPGA kit.The result is around 95% of theoretical Gen3 PCIe based DMA engine bandwidth[7.2 Gbps].
| Presentation type | Oral |
|---|
Author
Mr
Sanjoy Mukherjee
(Bose Institute)
Co-authors
Dr
Filippo Costa
(CERN)
Mr
Rourab Paul
(Calcultta University)
Dr
Amlan Chakrabarti
(Calcutta University)
Mr
Shuaib Ahmad Khan
(Variable Energy Cyclotron Centre)
Mr
Jubin Mitra
(Variable Energy Cyclotron Centre)
Dr
Tapan Kumar Nayak
(CERN)
