Jul 4 – 11, 2018
COEX, SEOUL
Asia/Seoul timezone

ATLAS Calorimeter system: Run-2 performance, Phase-1 and Phase-2 upgrades

Jul 5, 2018, 9:24 AM
12m
103 (COEX, Seoul)

103

COEX, Seoul

Parallel Detector: R&D for Present and Future Facilities Detector: R&D for Present and Future Facilities

Speaker

Steffen Stärz (CERN)

Description

The ATLAS detector was designed and built to study proton-proton collisions produced at the LHC at centre-of-mass energies up to 14 TeV and instantaneous luminosities up to 10^{34} cm^{−2} s^{−1}. A liquid argon-lead sampling calorimeter (LAr) is employed as electromagnetic calorimeter and hadronic calorimeter, except in the barrel region, where a scintillator-steel sampling calorimeter (TileCal) is used as hadronic calorimeter.

ATLAS recorded 87 fb^{-1} of data at a center-of-mass energy of 13 TeV between 2015 and 2017. In order to achieve the level-1 acceptance rate of 100 kHz, certain adjustments have been performed. The calorimetry system performed accordingly to its design values and have played a crucial role in the ATLAS physics programme. This contribution will give an overview of the detector operation, monitoring and data quality, as well as the achieved performance, including the calibration and stability of the energy scale, noise level, response uniformity and time resolution of the ATLAS calorimetry system.

The upgrade projects of the ATLAS calorimeter system will also be presented.

For Run-3, where luminosities around L ≃ 2 × 10^{34} cm^{−2} s^{−1} will be achieved, an upgrade of the LAr trigger readout is necessary to keep a high signal efficiency. The LAr Trigger Digitizer frontend system will digitize 34000 channels at 40 MHz with 12 bit precision after bipolar shaping. The backend LAr Digital Processing system will compute the energy and time of the signals. Results of ASIC developments including QA and radiation hardness evaluations, performances of the final prototypes and results of the system integration tests will be presented along with the overall system design.

For the high luminosity phase of the LHC (HL-LHC), the luminosity will increase up to L ≃ 7.5 × 10^{34} cm^{−2} s^{−1} leading to an average pile-up up to 200 interactions per bunch crossing. The electronics of both calorimeters has to be upgraded to cope with longer latencies of up to 35 µs needed by the trigger system at such high pileup levels. The expected radiation doses will also exceed the qualification range of the current readout system.

Low-noise, low-power, radiation-tolerant and high-bandwidth electronics components are being developed in 65 and 130 nm CMOS technologies for the LAr system. First prototypes of the front-end electronics components show good promise to match the stringent specifications. The off-detector electronics will make use of FPGAs connected through high-speed links to perform energy reconstruction, data reduction and buffering.
For the Tile system, the photomultiplier signals will be digitized and transferred off-detector to the TileCal PreProcessors (TilePPr) for every bunch crossing, requiring a data bandwidth of 40 Tbps. The TilePPr will reconstruct, store and send the calorimeter signals to first level of trigger at a rate of 40 MHz. In parallel, the data samples will be stored in pipeline memories and the data of the events selected by the ATLAS central trigger system and transferred to the ATLAS global Data AcQuisition (DAQ) system for further processing.
Results of tests of the first prototypes will be presented, along with design studies and simulations of the performance of the readout system.

Primary author

Presentation materials