Speaker
Igor Mandic
(Jozef Stefan Institute (SI))
Description
RD50 submitted a pixel detector prototype ASIC in the 150 nm CMOS technology at LFoundry. It contains two matrices of MAPS pixels and few test structures. The test structures include passive pixel arrays near the edge of the chip suitable for E-TCT measurements. The chips were manufactured on p-type silicon with two different initial resistivities around 500 Ohm-cm and 2000 Ohm-cm. Chips were irradiated with neutrons in Ljubljana up to maximal fluence of 2e15 n/cm2. Edge-TCT measurements were made with passive devices and evolution of effective space charge concentration on neutron fluence was measured for the two different initial resistivities. Results of this study will be presented in this contribution.
Primary author
Igor Mandic
(Jozef Stefan Institute (SI))
