12–17 Sept 2021
University of Birmingham
Europe/London timezone

Prototype Characterization of a Charge-integrating Pixel Detector Readout Chip with In-pixel A/D conversion

13 Sept 2021, 10:10
15m
Teaching and Learning Building (University of Birmingham)

Teaching and Learning Building

University of Birmingham

Edgbaston Campus University of Birmingham B15 2TT UK
talk Detectors for FELS, Synchrotrons and Other Advanced Light Sources Detectors for FELS, Synchrotrons and Other Advanced Light Sources

Speaker

Mujin LI (IHEP,CAS)

Description

The HYLITE (High dYmamic range Laser Imaging deTEctor) is a new hybrid pixel detector readout chip, which is designed for advanced light sources such as X-ray Free Electron Laser (XFEL) and diffraction-limited storage rings. These X-ray sources produce beams with high intensities, high repetition frequency and good coherence. In order to make use of these excellent properties, the detector system with higher dynamic range and readout speed is needed. HYLITE is a charge-integrating readout chip which has three gains for different dynamic ranges and automatic gain switching function. The full dynamic range covered by HYLITE is 1~10000 photons at 12keV for each pixel in every shot. In-pixel ADC is designed to achieve front-end digitalization and 10 kHz continuous frame rate.

HYLITE 0.1 is the first prototype chip designed using CMOS 0.13 mm technology to verify basic pixel functions. The pixel array consists of 6×12 pixels. The size of each pixel is 200μm×200μm and will be improved to 100μm×100μm in the future. Six different design variations of pixels with different integrating capacitance and structures were designed to help optimize between area and performance. The test results showed that the non-linearity of the pre-amplifier is 0.16%, 0.51%, and 1.11% in high, medium and low gain mode, respectively. A 10bits Wilkinson ADC is integrated in each pixel to digitalize the output of pre-amplifier. The linear feedback shift register (LFSR) is used as the ADC clock counter as well as the readout shifter for compacting the layout area. By front-end digitalizing, analog signal transmission of long distance is avoided and frame rate of 10 kHz was also tested and proved.

Title Ms
Your name Li Mujin
Institute IHEP,CAS
email limujin@ihep.ac.cn
Nationality China

Primary authors

Mujin LI (IHEP,CAS) Wei Wei (IHEP, CAS, China) XIAOSHAN JIANG (IHEP) Shanshan CUI (IHEP,CAS)

Presentation materials