Speaker
Dr
Paul Rubinov
(Fermilab)
Description
This report describes a system designed to simplify the use of SiPM in small scale projects, with 1 to 100 SiPMs. The system consists of 4ch digitizer boards (called TB4), and Windows software. Each TB4 contains 4 channels of electronics with gain appropriate for use with SiPMs, and four 14bit, 250MSPS digitizers. Each TB4 also has a Cockroft Walton voltage multiplier to generate the necessary bias for SiPMs of up to 100V. There is only one bulk bias, but there is an offset for each channel, to enable the fine tuning of the bias to each SiPM. Each TB4 interfaces to the computer via USB, and can transfer the digitized waveforms of up to 4k points per channel. The TB4 also includes a moderate sized FPGA for implementing algorithms (such as digital filtering or self triggering) on board. There is also an optional motherboard which can be used with up to four TB4 boards which provides higher bandwidth readout. It can be read out via Fast Ethernet or custom LVDS protocols. Each mother board also provides for synchronization of clocks and triggers and multiple motherboards can be connected together to build a larger system. This system has been successfully used at test beam at CERN and Fermilab and numerous other test at various universities.
Primary author
Dr
Paul Rubinov
(Fermilab)
