Sep 20 – 24, 2010
Aachen, Germany
Europe/Zurich timezone

Development of custom radiation-tolerant DCDC converter ASICs

Sep 21, 2010, 3:30 PM
25m
Hörsaal III

Hörsaal III

Oral Power, grounding and shielding Power, Grounding and Shielding

Speaker

Dr Federico Faccio (CERN)

Description

The development of a custom radiation-tolerant DCDC converter ASIC is under way, aiming at an input voltage of 10V and an output power up to 8W. CMOS technologies for the development have been tested for radiation, and two of them satisfied the specifications even for upgraded trackers to SLHC levels. The design of 2 ASIC prototypes is presented, with measurements indicating that both the efficiency and radiation tolerance requirements are met. A third and more complete design has been submitted for fabrication in January and its full characterization, including radiation effects, will also be presented.

Summary

The availability of a radiation and magnetic field tolerant DCDC converter would be a very valuable asset in improving the power distribution of upgraded detector systems (with special emphasis on the tracker and calorimeters). A set of generic specifications meeting most requirements for such applications includes an input voltage of 10V, an output voltage of 1-5V, and a power of 3-8W. The requirement of radiation tolerance is the main motivation for the development of an ASIC, since this should be assured for all effects: Total Ionizing Dose (TID), displacement damage and Single Event Effects (SEEs). The long-term availability of the parts, and the capability to quickly transfer the design in a different technology, have also to be ensured.
A considerable effort has been deployed in characterizing the radiation response of 5 candidate technologies for the ASIC, and as a result the IHP SGB25VGOD technology has been selected (and a backup technology has also been chosen). The full radiation characterization of this technology will be presented, including dedicated Heavy Ion irradiation tests for Single Event Burnout in the high-voltage transistors.
Prototype DCDC converter ASICs have been developed in both the IHP and the backup technology from On-semiconductors. At the time of writing this summary, we have results on 2 prototype ASICs, both fully meeting their respective design specifications. These designs will be presented, together with the experimental results that include, for one of them, successful characterization up to 300Mrad (TID) and 5E15 1-MeV equivalent neutron fluence (displacement damage). During these measurements, only a marginal decrease of the efficiency has been detected, and the circuits were constantly fully functional. The other tested prototype, in the IHP technology, has not yet been radiation tested but its electrical performance is very good, with a measured efficiency up to 84% for conversion from 10 to 2.5V and a current of 2A. From 10V input voltage, the converter could regulate an output voltage between 0.9 and 3.3V and a current of 1 to 2 A. During these tests, it was switching at a selectable frequency between 1 and 3.6MHz, and an efficiency close to 70% was measured for a conversion ratio of 11.
Another and more complete prototype ASIC has been submitted to IHP for fabrication in January and should be delivered in May. This design will be presented, since it includes additional circuitry making it our most complete prototype to date. On-chip regulators have been added to produce all necessary control voltages. An over-current circuitry monitors the output current at every cycle and protects the converter and the line from excessive current pulses. A more safe and sophisticates soft-start procedure has been implemented. Eventually, and to allow the converter to work with maximum efficiency for any chosen value of the inductor, dead time handling during commutation is performed by dedicated circuitry. Results should certainly be available on this more advanced prototype, including full radiation characterization.

Primary authors

Co-authors

Mr Bruno Allongue (CERN) Mr Cristian Fuentes (CERN and UTFSM (Valparaiso, Chile)) Dr Fabio Ongaro (Udine University) Mr Georges Blanchot (CERN) Mr Stefano Orlandi (CERN) Dr Stefano Saggini (Udine University)

Presentation materials