24–29 May 2020 Postponed
America/Vancouver timezone

Development of pixelated silicon sensor integrated with junction field effect transistor

25 May 2020, 16:00
7h 58m
Poster Sensors Poster

Description

We fabricated a pixelated silicon sensor with junction field effect transistor (JFET) on a 650 μm-thick, high resistivity (> 5 kΩ·cm) n-type and double-sided polished 6-inch silicon wafer using double-sided fabrication process. The JFET with cylindrical structure acts as a switch to readout charges accumulated in the pixelated sensor. We presented electrical characteristics of the fabricated pixelated silicon sensors integrated with the JFET with a size of 100x100 um2. The drain currents as a function of the drain voltage for different the gate voltages were measured to verify the performance of the JFET as a switch and we determined the optimized design parameters of the pixelated sensor to provide the proper functioning of the switch. LEDs and X-rays were irradiated to the fabricated pixelated silicon sensor integrated with the JFET to measure the sensor's response and the results were also presented.

Primary authors

Hyebin Jeon (Kyungpook National University) Seungcheol Lee (Kyungpook National University) Mr Kookhyun Kang (Kyungpook National Universiy) jinyong kim

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