Speaker
Grzegorz Korcyl
(Jagiellonian University)
Description
Recent FPGA accelerator cards promise large acceleration factors for some specific computational tasks. In the context of Lattice QCD calculations, we investigate the possible gain of moving the SU(3) gauge field smearing routine to such accelerators. We study Xilinx Alveo U280 cards in conjunction with Vitis high-level synthesis framework. We discuss the possible pros and cons of such solution based on gathered benchmarks.
Primary authors
Grzegorz Korcyl
(Jagiellonian University)
Piotr Korcyl
(Jagiellonian University & University Regensburg)
Salvatore Cali
(MIT)
