May 16 – 20, 2022
Europe/Zurich timezone

Development of the ATLAS Liquid Argon Calorimeter Readout Electronics for the HL-LHC

May 17, 2022, 7:00 PM
Experimental poster Upgrade & Future Projects Poster Session I


Maheyer Jamshed Shroff (University of Victoria (CA))


A new era of hadron collisions will start around 2028 with the High-Luminosity LHC, that will allow to collect ten times more data that what has been collected so far at the LHC. This is possible thanks to a higher instantaneous luminosity and higher number of collisions per bunch crossing.

To meet the new trigger and data acquisition requirements and withstand the high expected radiation doses at the High-Luminosity LHC, the ATLAS Liquid Argon Calorimeter readout electronics will be upgraded. The triangular calorimeter signals are amplified and shaped by analogue electronics over a dynamic range of 16 bits, with low noise and excellent linearity. Developments of low-power preamplifiers and shapers to meet these requirements are ongoing in 130nm CMOS technology. In order to digitize the analogue signals on two gains after shaping, a radiation-hard, low-power 40 MHz 14-bit ADCs is being developed using a pipeline+SAR architecture in 65nm CMOS. The characterization of the prototypes of these on-detector components is promising and will likely fulfill all the requirements.

The signals will be sent at 40MHz to the off-detector electronics, where FPGAs connected through high-speed links will perform energy and time reconstruction through the application of corrections and digital filtering. Reduced data are then sent with low latency to the first-level trigger-system, while the full data are buffered until the reception of the trigger decision signal. If an event is triggered, the full data is sent to the ATLAS readout system. The data-processing, control, and timing functions will be realized with dedicated boards using the ATCA technology.

The results of tests of prototypes of the on-detector components will be presented. The design of the off-detector boards along with the performance of the first prototypes will be discussed. In addition, the architecture of the firmware and processing algorithms will be shown.

Primary authors

Collaboration ATLAS Junjie Zhu (University of Michigan (US)) Sandra Leone (Universita & INFN Pisa (IT))

Presentation materials