Speaker
Description
RD50-MPW3, the third HV-CMOS sensor chip iteration designed by the RD50 CMOS Working Group, was delivered during the summer of 2022. RD50-MPW3 has a matrix of 64 × 64 pixels which integrate both analogue and digital readout electronics inside each of them. An optimised digital readout peripheral for effective chip configuration and fast data transmission is included in this chip.
A dedicated carrier board was designed to evaluate the chip with the Caribou readout system. The firmware and software to program and measure the chip was developed. The chip is currently being evaluated in laboratory.
This contribution gives an overview of the design details of RD50-MPW3. Initial laboratory evaluation results will also be presented. The beamtest result of the chip will be presented in a separate contribution to this workshop.
