23–28 Oct 2022
Asia/Tokyo timezone

[D06] R&D status of monolithic SOI pixel sensor for vertex detector

25 Oct 2022, 16:00
30m
Talk (invited speaker only) The talk is invitation only monolithic

Speaker

Akimasa Ishikawa (KEK)

Description

SOI wafer consists of a high-resistive handle wafer and a CMOS LSI circuit layer, and these two layers are isolated by a Silicon oxide layer. The handle wafer corresponds to the radiation sensor.
Produced charges in the sensor are read out through tungsten VIA to the circuit. Sensor thickness can be changed from 500 to 50 um according to application. This allows the fabrication of complex circuits in a small pixel since there is no mechanical bonding like a hybrid-type silicon detector. We will introduce the recent R&D status of SOI sensors.

contact person e-mail akimasa.ishikawa@kek.jp

Author

Presentation materials