Indico has been updated to v3.3. See our blog post for details on this release. (OTG0146394)

The 31st International Workshop on Vertex Detectors


The International Workshop on Vertex Detectors (VERTEX) is a major annual series of international workshops for physicists and engineers from the high energy and nuclear physics community. VERTEX provides an international forum to exchange the experiences and needs of the community, and to review recent, ongoing, and future activities on silicon based vertex detectors. The workshop covers a wide range of topics: existing and future detectors, new developments, radiation hardness, simulation, tracking and vertexing, electronics and triggering, applications to medical and other fields. 

The 31st edition of the series VERTEX2022 will be held on October 24th-28th 2022. The meeting will be on-site at Tateyama Resort Hotel in Japan under the COVID-19 restrictions. No hybrid type meeting. 

Japan is currently (as of Sep.7) restricting the number of inbounds be less than 50 thousand/day, and VISA is required. It is announced (as of Sep. 22) that the COVID-19 restriction at entry will be void from October 11st.  

Participation to the workshop is open to all (maximum number of rooms is set to 56 currently). The standard presentations are by invitation only. Short oral presentations (15min including discussion: there is no poster session) are for open contributions. Call for Abstracts for short oral/ poster is closed on August 15th (It is temporarily open only for late invited speakers.).

Registration is open from August 8th and closed on September 29th. Those foreigners who registered or plan to register should swiftly proceed to acquire your Visa (visit the page at left). 

Indico registration is set open to collect your request of transportation (modify your information on the registration page).


    • 1
    • 7:00 PM
    • 5:00 AM
      pickup at Narita (sunday):procedure has been informed to individuals who requested.
    • 5:25 AM
      dinner on Sunday in 1800-2030. Those who missed will receive a meal box
    • 7:00 AM
    • 8:00 AM
      Registration starts 17:00 on Sunday next to the hotel front desk. Open on Monday 8:00 in the convention hall. and available till start of the sessions and during coffee break
    • 2
      Welcome and Introduction Convention Hall (Tateyama Resort Hotel)

      Convention Hall

      Tateyama Resort Hotel

      Speaker: Kazuhiko Hara (University of Tsukuba (JP))
    • Running Detectors: (I)
      Convener: Kazuhiko Hara (University of Tsukuba (JP))
      • 3
        [A01] CMS Inner Tracker Status and Performance

        The CMS pixel tracker provided high-quality physics data during the LHC Run 2, finishing with a detector live fraction of 95% and hit efficiency of >99% in all but the innermost layer. However, issues encountered during Run 2 - in particular DCDC converter failures during power cycles to reset stuck TBMs - necessitated a thorough refurbishment of the detector during LS2. The innermost layer of the barrel section was replaced, incorporating new versions of the PROC600 readout chip, TBM, and HDI. New FEAST 2.3 DCDC converters were installed in the full detector, and damaged modules were replaced where accessible. The refurbished pixel detector was reinstalled in CMS in June 2021. A thorough period of commissioning followed, including the acquisition of 3.5M cosmics tracks for alignment. Currently, the detector is taking the first 13.6 TeV data of Run 3. This talk will summarize the refurbishment and commissioning of the pixel detector, as well as preliminary performance results from Run 3 operation.

        Speaker: Giulia Negro (Purdue University (US))
      • 4
        [A02] Operational Experience and Performance with the ATLAS Pixel detector at the Large Hadron Collider at CERN

        The tracking performance of the ATLAS detector relies critically on its 4-layer Pixel Detector. As the closest detector component to the interaction point, this detector is subjected to a significant amount of radiation over its lifetime. By the end of the LHC proton-proton collision RUN2 in 2018, the innermost layer IBL, consisting of planar and 3D pixel sensors, had received an integrated fluence of approximately Φ = 9 × 10**14 1 MeV neq/cm^2. The ATLAS collaboration is continually evaluating the impact of radiation on the Pixel Detector. During the LHC long shutdown 2 (LS2) dedicated data taking of cosmic rays have been taken at this purpose.
        In this talk the key status and performance metrics of the ATLAS Pixel Detector are summarised, and the operational experience and requirements to ensure optimum data quality and data taking efficiency will be described, with special emphasis to radiation damage experience. A quantitative analysis of charge collection, dE/dX, occupancy reduction with integrated luminosity, under-depletion effects, effects of annealing will be presented and discussed, as well as the operational issues and mitigation techniques adopted during the LHC Run2 and the ones foreseen for Run3.
        The focus of this talk will be a first report of the operation and performance of the Pixel Detector during the start of Run 3.

        Speaker: Kerstin Lantzsch (University of Bonn (DE))
      • 5
        [A03] Commissioning and performance of the new ALICE Inner Tracking System in the first phase of LHC Run 3

        ALICE is one of the experiments at the CERN Large Hadron Collider (LHC) studying nuclear matter at extreme conditions of temperature and pressure. The LHC Run 3
        will start officially in July this year after a shutdown of more than two years to allow for the upgrade of both the accelerator and the experiments. In Run 3, Pb--Pb
        collisions will be performed at an unprecedented centre of mass energy per nucleon of 5.5 TeV, with a luminosity of 6 $\times$ 10$^{27}$ cm$^{-2}$s$^{-1}$ and at an interaction.
        rate of up to 50 kHz. To fulfill the requirements of the ALICE physics program for Run 3, a major upgrade of the experimental apparatus has been successfully
        completed in summer 2021 with the installation of several new detectors in the ALICE cavern. A key detector of the apparatus is the new, ultra-light, high-resolution
        Inner Tracking System (ITS2) that significantly enhance the resolution on the determination of the distance of closest approach to the primary vertex, the tracking efficiency
        at low transverse momenta, and the read-out rate capabilities with respect to what was achieved in the LHC Run 2 with the older tracker. The new tracker consists of seven
        layers, azimuthally segmented into Staves, equipped with silicon Monolithic Active Pixel Sensors with a pixel size of the order of 30×30 $\mu m^2$ covering, for the first time,
        a sensitive area of about 10 m$^2$.
        This contribution will show the long effort which allowed the construction, characterization, installation and commissioning of the new tracking system with the
        focus on the most recent commissioning phase into the ALICE cavern. In addition, the second part of the talk will be dedicated to the new performance results obtained
        from the first proton-proton collisions of the LHC Run 3.

        Speaker: Ivan Ravasenga (Nikhef National institute for subatomic physics (NL))
      • 6
        [A04] Operational Experience and Performance of the Belle II Pixel Detector

        The Belle II experiment at the super KEK B factory (SuperKEKB) in Tsukuba, Japan has been collecting $e^+e^-$ collision data since March 2019. Operating at a record breaking luminosity of up to $4.7 \times 10^{34}\, \textrm{cm}^{-2}\, \textrm{s}^{-1}$, data corresponding to $424\, \textrm{fb}^{-1}$ has since been recorded. The Belle II Vertex Detector (VXD) is central to the Belle II detector and its physics program and plays a crucial role in reconstructing precise primary and decay vertices. It consists of the outer 4-layer Silicon Vertex Detector (SVD) using double sided silicon strips and the inner 2-layer Pixel Detector (PXD) based on the depleted P-channel Field Effect Transistor (DEPFET) technology. The PXD DEPFET structure combines signal generation and amplification within pixels with a minimum pitch of $55 \times 50\, \mu\textrm{m}^2$. A high gain and a high signal-to-noise ratio allow thinning the pixels to $75\, \mu\textrm{m}$ while retaining a high pixel hit efficiency of about 99\%. As a consequence, also the material budget of the full detector is kept low at $0.21\%\, X_0$ per layer in the acceptance region. This also includes contributions from the control, ADC, and data processing ASICs as well as from cooling and support structures. \
        The talk will present the experience gained from 4 years of operating PXD; the first full scale detector employing the DEPFET technology in HEP. Overall, the PXD has performed very well and robustly meeting expectations. Operating in the intense SuperKEKB environment poses many challenges that will also be discussed.
        The current PXD system remains incomplete with only 20 out of 40 modules having been installed. This is why a full replacement has been constructed and is currently in its final testing stage before it will be installed into Belle II during the ongoing long shutdown that will last throughout 2023.

        Speaker: Arthur Bolz
    • 10:45 AM
    • Running Detectors: (II)
      Convener: Andrey Starodumov (Rudjer Boskovic Institute (HR))
      • 7
        [A05] The Silicon Vertex Detector of the Belle II Experiment

        The Belle II experiment is taking data at the asymmetric SuperKEKB collider, which operates at the Y(4S) resonance. The vertex detector is composed of an inner two-layer pixel detector (PXD) and an outer four-layer double-sided strip detector (SVD). The SVD-standalone tracking allows the reconstruction and identification, through dE/dx, of low transverse momentum tracks. The SVD information is also crucial to extrapolate the tracks to the PXD layers, for efficient online PXD-data reduction.
        A deep knowledge of the system has been gained since the start of operations in 2019 by assessing the high-quality and stable reconstruction performance of the detector. Very high hit efficiency, and large signal-to-noise are monitored via online data-quality plots. The good cluster-position resolution is estimated using the unbiased residual with respect to the track, and it is in reasonable agreement with the expectations.
        The SVD dose is estimated by the correlation of the SVD occupancy with the dose measured by the diamonds of the radiation-monitoring and beam-abort system. First radiation damage effects are measured on the sensor current and strip noise, although they are not affecting the performance
        Currently the SVD average occupancy, in its most exposed part, is still < 0.5%, which is well below the estimated limit for acceptable tracking performance. With higher machine backgrounds expected as the luminosity increases, the excellent hit-time information will be exploited for background rejection, improving the tracking performance. The front-end chip (APV25) is operated in “multi-peak” mode, which reads six samples. To reduce background occupancy, trigger dead-time and data size, a 3/6-mixed acquisition mode based on the timing precision of the trigger has been successfully tested in physics runs. Recent developments demonstrate that the Belle II event time obtained from SVD data is calculated faster than alternative estimations, while achieving the same accuracy.

        Speaker: Mr Kookhyun Kang (Kyungpook National Universiy)
      • 8
        [A06] The Vertex Locator at LHCb Upgrade I

        LHCb is a forward spectrometer at LHC (CERN), aimed to study CP-violation in b-quark physics, but proven during the 2011-2018 data taking years to be a general purpose spectrometer with many exciting measurements. The Vertex Locator (VELO) is a silicon pixel tracking detector in the heart of the LHCb spectrometer. As a higher instantaneous luminosity of 2*10^{33} s^{-1} cm^{-2} is expected during Run 3 (2022 - 2025), the tracking detectors, including the VELO detector, were upgraded, and the hardware trigger was dropped. The upgraded VELO is a brand-new detector that replaces the silicon-strip technology with new 55 micrometers pitch pixels, operating as close as a 5 mm radius from the LHC beams. The VELO new readout ASIC, called VeloPix, is capable of operating at the 40 MHz collision rate, reaching 900 MHits/s. The detector is built with a modular design, composed of 52 modules divided into two-detector halves. The production of the required modules was completed in 2021, leading to the detector assembly phase. Both detector halves were successfully installed in May 2022. In this presentation, the final steps of construction and installation will be shown. The detector is now under commissioning with beam and preliminary results will also be presented.

        Speaker: Valeriia Lukashenko (Nikhef National institute for subatomic physics (NL))
      • 9
        [A07] Status of the Upstream Tracker

        The LHCb experiment is a forward spectrometer at the Large Hadron Collider designed to study decays of beauty and charm hadrons. After a very successful data taking phase, an upgraded detector is constructed and currently being commissioned with the goal of taking data at a luminosity of $2 \times 10^{33} \mathrm{cm}^{-2} \mathrm{s}^{-1}$. A key feature is the implementation of a flexible software trigger that requires all the detector components to push out their information at 40 MHz and a fast track finding algorithm that allows for fast event processing. The Upstream Tracker (UT) of LHCb, located upstream of the LHCb bending magnet, is part of the tracking system comprised of the pixel vertex detector (VELO), surrounding the interaction region, and the SciFi detector, located downstream the magnet. The UT is crucial for charged track reconstruction and fast trigger decisions based on a tracking algorithm involving also vertex detector information.

        The detector consists of four planes with a total area of about 8.5
        m$^2$, made of single-sided AC coupled silicon strip sensors featuring embedded pitch-adapters, read out by a novel custom-made ASIC (SALT). Modules composed of a SI detector, the hybrid circuit hosting the SALT ASICS mounted on a boron nitride stiffener are mounted on both sides low-mass structures (staves) providing mechanical support and cooling. The near detector electronics, assembled on the top and bottom of the detector box, provides the interface to the remote data acquisition system and the control signals necessary to configured and read out the SALT ASICs. Low-noise power is provided by low voltage regulator boards located about 10 m from the detector. This contribution describes the various components with particular emphasis on the lesson learned during the assembly, the mechanical and electronics quality assurance of the various subsystems, in preparation for the commissioning phase planned for the year-end technical stop.

        Speaker: Dimitra Andreou (Syracuse University (US))
    • 12:35 PM
    • Running Detectors: (III)
      Convener: Andrey Starodumov (Rudjer Boskovic Institute (HR))
      • 10
        [A08] CMS Outer Tracker: Operational Experience and Performance

        The CMS silicon strip tracker consisting of 15000 silicon modules with a 200 m2 active area has been successfully taking data in LHC Run 1 and Run 2. After the second long shutdown period from the end of 2018, the detector resumed operations in Summer 2021 and will be operational till the end of LHC Run 3, before the HL-LHC upgrade. In this presentation, the performance of the detector during the Run 2 will be summarized. The projections of the detector performance during Run 3 will be discussed, with particular emphasis on the expected changes in detector performance with increasing irradiation. The performance of the detector during the early Run 3 collisions will also be presented.

        Speaker: Suvankar Roy Chowdhury (Universita & INFN Pisa (IT))
      • 11
        [A09] The operational experience and performance of the SCT during Run-2 and LS2, and the first impression from Run3 operations

        The ATLAS SemiConductor Tracker (SCT) had been maintained during the
        long shutdown 2 (LS2) and restarted operations in LHC Run-3. As reported in
        the previous VERTEX conference, the SCT successfully operated in LHC Run-2
        (2015-2018) which came with high instantaneous luminosity and pileup
        conditions that were far in excess of what the SCT was originally designed to
        meet. The first significant effects of radiation damage in the SCT were also
        observed during Run-2. The operation condition of SCT from LHC Run-3 is
        expected to be the same as those in Run-2. This talk will summarise the
        operational experience and performance of the SCT during Run-2 and LS2, and
        the first impression from Run3 operations. Also the observation and prospect
        of the radiation damage on SCT silicon strip sensors will be presented.

        Speaker: Hanna Maria Borecka-Bielska (Universite de Montreal (CA))
      • 12
        [A10] Early data from the tracking detector for the FASER experiment

        FASER is a new experiment designed to search for new light weakly-interacting long-lived particles (LLPs) and study high-energy neutrino interactions in the very forward region of the LHC collisions at CERN. The experimental apparatus is situated 480 m downstream of the ATLAS interaction-point aligned with the beam collision axis. The FASER detector includes four identical tracker stations constructed from silicon microstrip detectors. Three of the tracker stations form a tracking spectrometer, and enable FASER to detect the decay products of LLPs decaying inside the apparatus, whereas the fourth station is used for the neutrino analysis. All tracker stations have been installed in the LHC complex in 2021. FASER has already started physics data taking since the LHC resumed operation in July 2022. This talk describes the design, construction and early data of the tracker stations.

        Speaker: Benedikt Vormwald (CERN)
      • 13
        [A11] Silicon strip detector for muon g-2/EDM experiment at J-PARC

        The anomalous magnetic moment of muon, muon g-2, has been precisely measured by the experiments at BNL and FNAL, and there is a 4.2 sigma discrepancy between the measurement and the prediction. A new experiment to measure the muon g-2 is planned at J-PARC, based on a different strategy. A low emittance muon beam is stored in a compact storage magnet, and spin precession of muons is reconstructed from the decay positron orbits.

        For this purpose, a silicon detector is being developed to track decay positrons. It consists of 160 modules called quarter-vane, on which four $100\,\mathrm{cm^2}$ silicon strip sensors are mounted. Assembly of the quarter-vanes will start from 2024, and its preparation is ongoing. The 15000 readout ASICs has been produced, and its quality assurance system has been developed. Assembly procedure of quarter-vane is also being studied, including a sensor alignment method with a few um precision. This talk summarizes the status and the outcome of these studies.

        Speaker: Shinji OGAWA
    • 3:20 PM
    • Upgrade: (I)
      Convener: Hans-Gunther Moser (Max Planck Society (DE))
      • 14
        [B01] The CMS Pixel Detector for the High Luminosity LHC

        The High Luminosity Large Hadron Collider (HL-LHC) at CERN is expected to collide protons at a centre-of-mass energy of 14 TeV and to reach the unprecedented peak instantaneous luminosity of $5-7.5x10^{34} cm^{-2}s^{-1}$ with an average number of pileup events of 140-200. This will allow the ATLAS and CMS experiments to collect integrated luminosities up to 3000-4000 fb$^{-1}$ during the project lifetime. To cope with this extreme scenario the CMS detector will be substantially upgraded before starting the HL-LHC, a plan known as CMS Phase-2 upgrade. The entire CMS silicon pixel detector will be replaced and the new detector will feature increased radiation hardness, higher granularity and capability to handle higher data rate and longer trigger latency. In this talk the Phase-2 upgrade of the CMS silicon pixel detector will be reviewed, focusing on the features of the detector layout and technological choices and summarising the R&D activities.

        Speaker: Giacomo Sguazzoni (INFN (IT))
      • 15
        [B02] The CMS Outer Tracker for the High Luminosity LHC

        The High Luminosity LHC (HL-LHC) is expected to deliver an integrated luminosity of $3000-4000\;$fb$^{-1}$ by the end of 2039 with peak instantaneous luminosity reaching to about $5-7.5\times10^{34}$cm$^{-2}$s$^{-1}$. During the Long Shutdown 3 period, several components of the CMS detector will undergo major changes, called Phase-2 upgrades, to be able to operate in the challenging environment of the HL-LHC. The current silicon outer tracker has to be replaced witth a new one for operating in the HL-LHC period. The Phase-2 Outer Tracker (OT) will have high radiation tolerance, higher granularity and capability to handle higher data rates. Another key feature of the OT will be to provide tracking information to the Level-1 trigger, allowing trigger rates to be kept at a sustainable level without sacrificing physics potential. For this, the OT will be made out of modules which have two closely spaced sensors read-out by a common front-end ASIC, which can correlate hits in the two sensors creating short track segments called "stubs". The stubs will be used for tracking in the L1 trigger stage. In this contribution, the design of the CMS Phase-2 OT, the technological choices and highlights about research and development activities will be reported.

        Speaker: Fabio Ravera (Fermi National Accelerator Lab. (US))
      • 16
        [B03] Level-1 Track Finder for the CMS Upgrade for HL-LHC

        The upgrade of the Large Hadron Collider (LHC) to the High-Luminosity LHC (HL-LHC) will provide a greater number of simultaneous proton-proton collisions, yielding more data for physics analysis, but imposing greater demands on the triggering systems of the detectors. In response, the CMS Collaboration is designing a novel Level-1 (hardware) track trigger using data from the outer tracker. Its aim is to reconstruct, within 4 µs, the tracks of all charged particles with pT > 2 GeV. This has never been done before at CMS and depends on the innovative design of the outer tracker that enables it to transmit only the hits compatible with particles of pT > 2 GeV to the off-detector track-finder electronics. There, tracks will be reconstructed by an algorithm implemented on programmable chips (FPGAs) and sent to the Level-1 trigger.
        This presentation will give an overview of the L1 track finder and the corresponding firmware algorithm. It will also discuss the current state of the testing of the firmware in both simulations and hardware, the unique challenges faced so far, and possible challenges in the future.

        Speaker: Mei-Li Holmberg (Science and Technology Facilities Council STFC (GB))
      • 17
        [B04] Characterisation of 3D pixel sensors for the CMS upgrade at the High Luminosity LHC

        The High Luminosity upgrade of the CERN Large Hadron Collider (HL-LHC) calls for an upgrade of the CMS tracker detector to cope with the increased radiation fluence, 2.3E16 neq/cm2 (1MeV equivalent neutrons) for the innermost layer while maintaining the excellent performance of the existing detector. An extensive R&D program aiming at 3D pixel sensors, built with a top-side only process, has been put in place by CMS in collaboration with FBK (Trento, Italy) and CNM (Barcelona, Spain) foundries. The basic 3D cell pixel sizes are 50x50 or 25x100 µm2, with one central readout electrode to be connected to the readout chip. In this presentation results obtained in beam test experiments before and after irradiations, up to ~2E16 neq/cm2, will be reported. The sensors were read out by RD53A and CROC, the first and last version of the 65 nm CMOS technology pixel readout chips which will be used in the HL-LHC inner tracker.

        Speaker: Mauro Dinardo (Universita & INFN, Milano-Bicocca (IT))
      • 18
        [B05] The vertex detector upgrade of the Belle II experiment

        The SuperKEKB accelerator and Belle II experiment have started full operation in 2019, establishing in 2022 a world record with an instantaneous luminosity of 4.7x10^34 cm^-2.s^-1.
        To reach the nominal luminosity parts of SuperKEKB will be modified with a time frame currently predicted to be around Long Shutdown 2 in 2026. Thus, the Belle II collaboration is considering the possibility to install an upgraded VXD system on the same time scale. Such an upgrade should provide a sufficient safety factor with respect to the background rate expected at the nominal luminosity and possibly enhance performances for tracking and vertexing.

        Several technologies are under consideration for the upgrade. One approach consists in improving performances of the technologies present in Belle II: faster DEPFET sensors for innermost layers, thinner and more granular DSSDs for the remaining layers. New monolithic technologies for pixel sensors are also under discussion, namely SOI and CMOS. They offer a combination of granularity, speed, low material budget and radiation tolerance matching well Belle II requirements and could be exploited to design a fully pixelated VXD, also benefiting from significant developments made in recent years for other experiments.
        Following this last concept, both simplified and complete simulations have been conducted to evaluate tracking and vertexing performances with various geometries (e.g. number of layers) and technical specifications (e.g. granularity, speed).

        This talk will review the context of the proposed VXD upgrade in Belle II, providing some details of the existing technological proposals and discussing performance expectations from simulations.

        Speaker: Toru Tsuboyama (High Energy Accelerator Research Organization)
      • 19
        [B06] Performance evaluation of front-end ASIC and DSSD sensor for Belle II Silicon Vertex Detector upgrade

        The Belle II Vertex Detector (VXD), which is located around the beam pipe, is one of key sub-detectors in the Belle II experiment that determines the vertex positions. To improve the tolerance for the beam background and reduce the material budget in the outer layers of the VXD, a new silicon strip detector, Thin and Fine-Pitch Silicon Vertex Detector (TFP-SVD), is proposed as a candidate for the VXD upgrade. A new Double-sided Silicon Strip Detector (DSSD), TFP-DSSD, and a new front-end ASIC, SNAP128, are being developed in the TFP-SVD project.

        TFP-DSSD sensor is characterized by thin thickness down to 140 um with strip pitch of 75(85) um for P(N) side. These properties reduce the material budget and hit rate per strip due to smaller covered area. The new SNAP128 ASIC is designed in 180 nm CMOS technology and has 128 input channels per chip. The input signal in each channel is processed by preamplifier, shaper and discriminator with the binary output sampled by 127MHz clock. The shaper output has a short pulse width of about 60 ns, which helps reducing signal pile-up at high hit-rate.

        This presentation reports the first performance evaluation of the prototype ASIC and sensor. For the ASIC, we report the measurement of the noise level, power consumption, and waveform of shaper output. We confirmed the basic functionality of SNAP128, and that the power consumption and analog pulse width meets the design requirements. Also, we found two major issues. The first one is that the discriminator circuit gets saturated when processing positive signals. The second one is that the noise at the target detector capacitance (15 pF) is about 1200 $e^-$, over the design limit of 800 $e^-$. Possible solutions to these two issues are discussed in this presentation.

        Speaker: Zihan Wang (the University of Tokyo)
    • 6:00 PM
    • 7:00 AM
    • Upgrade: (2)
      Convener: Heinz Pernegger (CERN)
      • 20
        [B07] ATLAS ITk Pixel Detector

        In the high-luminosity era of the Large Hadron Collider, the instantaneous luminosity is expected to reach unprecedented values, resulting in up to 200 proton-proton interactions in a typical bunch crossing. To cope with the resulting increase in occupancy, bandwidth and radiation damage, the ATLAS Inner Detector will be replaced by an all-silicon system, the Inner Tracker (ITk). The innermost part of the ITk will consist of a pixel detector, with an active area of about 13 $\mathrm{m}^2$. To deal with the changing requirements in terms of radiation hardness, power dissipation and production yield, several silicon sensor technologies will be employed in the five barrel and endcap layers. Prototype modules assembled with RD53A readout chips are being built to evaluate their production rate, thermal and electrical performance, and performance before and after irradiation. In addition, the new powering scheme – serial – will be employed in the ITk pixel detector, which will help to reduce the material budget of the detector as well as power dissipation. Multiple system-level tests are done with serial powering of pixel modules. This contribution presents the latest development of prototype modules, serial powering tests, and procedures of integration of modules and electrical services.

        Speaker: Helen Hayward (University of Liverpool (GB))
      • 21
        [B08] Performance of the ATLAS ITK Pixel detector prototype

        A new all-silicon Inner Tracker (ITk) has been designed for the ATLAS
        experiment at the HL-LHC. As part of this, a new pixel detector
        consisting of a total area of approximately 12m^2, will be constructed
        with planar and 3D pixel modules, mounted onto ring and stave shaped low
        mass carbon-fibre support structures. The data will be transmitted
        optically to the off-detector readout system. To save material in the
        servicing cables, serial powering is employed for the supply voltage of
        the readout ASICs. Together, these structures are arranged on larger
        structures to provide tracking up to a pseudo rapidity of 4.0.

        In order to validate the design choices of the pixel detector concept,
        prototypes of realistic, large-scale detector structures have been built
        and loaded with detector modules. These prototypes are evaluated with
        respect to the module performance after the full loading procedure.
        Beyond that also system level aspects, like the thermal performance,
        serial powering, and global monitoring capabilities of these structures
        are investigated.

        This contribution will summarize the key results of the design
        validation of these loaded local supports.

        Speaker: Benedikt Vormwald (CERN)
      • 22
        [B09] The ATLAS ITk Strip Detector System for the Phase-II LHC Upgrade

        The ATLAS experiment at the Large Hadron Collider (LHC) is currently preparing for an upgrade of the inner tracking detector for High-Luminosity LHC operation, scheduled to start in 2027. The new detectors must be faster and they need to be more highly segmented. The sensors used also need to be far more resistant to radiation, and they require much greater power delivery to the front-end systems. At the same time, they cannot introduce excess material which could undermine tracking performance. The new detector, known as the Inner Tracker or ITk, employs an all-silicon design with five inner Pixel layers and four outer Strip layers. This contribution focuses on the Strip region of the ITk. Staves, in the central region (barrel), and Petals in the forward regions (End-Caps), are the building blocks of the ITk Strip layers. They consist of a low-mass support structure which hosts the common electrical, optical and cooling services as well as a various number of modules: the smallest functional units of the ITk Strip Detector.

        Speaker: Stefania Antonia Stucci (Brookhaven National Laboratory (US))
      • 23
        [B10] ATLAS ITk Strip Sensor quality control and review of ATLAS18 pre-production sensor results

        With the upgrade of the LHC to the High-Luminosity LHC (HL-LHC), the Inner Detector will be replaced with the new all-silicon ATLAS Inner Tracker (ITk) to maintain tracking performance in a high-occupancy environment and to cope with the increase in the integrated radiation dose.
        Comprising an active area of $165\:\mathrm{m}^2$, the outer four layers in the barrel and six disks in the endcap region will host strip modules, built with single-sided micro-strip sensors and glued-on hybrids carrying the front-end electronics necessary for readout.
        The strip sensors are manufactured as n$\mathrm{^+}$-in-p strip sensors from high-resistivity silicon in 8 different shapes, from square in the barrel staves to a stereo annulus wedge-shape in the endcap discs, developed to withstand a total fluence of $1.6 \times 10^{15} \:\mathrm{n_{eq}/cm^2}$ and a total ionising dose of $66 \:\mathrm{MRad}$.
        In 2020 the ITk Strip Sensors project has transitioned into the pre-production phase, where 5% of the overall volume, a total of 1101 ATLAS18 wafers, was produced by Hamamatsu Photonics.
        Before being shipped out for module building, the ATLAS18 main sensors were tested at different institutes in the collaboration for mechanical and electrical compliance with technical specifications, the quality control (QC), while fabrication parameters were verified using test structures from the same wafers, the quality assurance (QA).
        The sensor QC evaluation program, test results and statistics, as well as experience gained from pre-production will be summarised in this contribution.

        Speaker: Christoph Thomas Klein (Carleton University (CA))
      • 24
        [B11] ATLAS ITk strip sensor quality assurance tests and results of ATLAS18 pre-production sensors

        Towards the high luminosity (HL) operation of the Large Hadron Collider (LHC), the inner detector of the ATLAS detector is replaced by a fully silicon-based inner tracker (ITk). Its outer parts consist of 22,000 $n^+$-in-$p$ type silicon strip sensors. In order to confirm key properties of the production sensors as well as to establish a flow to perform inspection and monitoring of the basic sensor properties, about 5\% of the total strip sensors were produced in 2020.

        In this presentation, outcomes from quality assurance (QA), detailed characterisation for the pre-production key device parameters before and after irradiation, are discussed, focusing mainly on charge collection, I-V and C-V characteristics. The irradiation to QA test pieces was performed with proton, neutron or gamma-ray beams up to 1.6x10$^{15}$ $n_\mathrm{eq}$/cm$^2$ or 0.66 MGy, which are equivalent to 1.5 times the total expected radiation fluences at the HL-LHC operation. Overall, good performance was confirmed. Besides, the results from the 154 QA test pieces allowed us to confirm that variations in the performance with the same condition of irradiation are small. Through experiences from the pre-production, more detailed understanding of post-irradiated ITk strip sensors as well as procedures of irradiation and post-irradiation testing was acquired based on enough statistics, which gave us full confident to initiate the main production project over 3.8 years.

        Speaker: Shigeki Hirose (University of Tsukuba (JP))
    • 10:15 AM
    • Upgrade: (3)
      Convener: Koji Hara (KEK)
      • 25
        [B12] Upgrade of the ALICE Inner Tracking System for LHC Run 4

        The ALICE experiment is preparing the ITS3, an upgrade of its Inner Tracking System for LHC Run 4. The three innermost layers will be replaced by wafer-scale, truly cylindrical, ultra-thin detector layers, made of Monolithic Active Pixel Sensors. This innovative technology will permit to reduce the material budget even further and to improve the tracking and vertexing capabilities. We will present the R&D programme, including the already achieved demonstration of the operability of bent MAPS, results of first measurements on new developed 65 nm CMOS technology, chosen for ITS3, and future plans.

        Speaker: Francesca Carnesecchi (CERN)
      • 26
        [B13] Beam test studies of bent MAPS for ALICE ITS3

        Bent Monolithic Active Pixel Sensors (MAPS) provide the basis for the next generation of ultra low material budget, fully cylindrical tracking detectors. In this contribution, results of beam campaigns with 5.4 GeV electrons will be presented. They verify the performance of bent 50 μm thick ALPIDE chips in terms of efficiency and space point resolution after bending them to the ALICE ITS3 radii of 18, 24, and 30 mm. In particular, an efficiency larger than 99.9% and a space-point resolution of approximately 5 μm are observed, both in line with the nominal operation of flat ALPIDE sensors.
        These values are found to be independent of the bending radius and thus demonstrate the feasibility of the planned ITS3 detector in crucial aspects.

        Speaker: Lukas Lautner (CERN, Technische Universitat Munchen (DE))
      • 27
        [B14] HV-MAPS for the LHCb Upgrade-II Mighty Tracker

        Proceeding into the High-Luminosity era of the LHC (HL-LHC) will see the instantaneous luminosity increase by an order of magnitude. The LHCb detector is expected to see an increase in integrated luminosity from 50 fb$^{-1}$ to as much as 300 fb$^{-1}$ in Run 5. Such an increase prompts an upgrade to the LHCb tracking system: to deal with higher occupancy in high-$\eta$, more interactions per bunch-crossing, and harsher radiation conditions - to name a few key challenges.

        For Upgrade-II of the LHCb detector, the proposed Mighty Tracker aims to address these challenges by incorporating monolithic HV-CMOS sensors into the design for the innermost region of the downstream tracking detector, whilst retaining the current Scintillating Fibre-based approach for the outer region. The HV-CMOS sensor for the Mighty Tracker, the MightyPix, is being developed to have sufficient radiation-hardness, and a time resolution of approximately $3$ ns to deal with the high occupancy expected in the inner region.

        After Run 3, accumulated radiation damage in the SciFi inner-region may impact detector performance enough to prompt an earlier introduction of HV-CMOS sensors into the tracking system, for stage Ib of the first Upgrade. If this opportunity is realised, a pilot "Inner Tracker" detector with HV-CMOS sensors could be seen in Run 4.

        This talk will cover plans for the Mighty Tracker, and some of the recent studies undertaken to date.

        Speaker: Ryunosuke O'Neil (The University of Edinburgh (GB))
    • ASIC
      Convener: Koji Hara (KEK)
      • 28
        [C01] The CMS tracking ASICs development

        The tracker upgrade of CMS introduces new challenges for the front-end readout ASICs. Higher channel density and sensor resolution with a good estimation of the z-coordinate allows for mitigating the higher pile-up in the event reconstruction. To Improve the single hit resolution and two-track separation is necessary to exploit the large amounts of collision data while having a drastically increased bandwidth. The introduction of data compression procedures will allow accommodating the higher data rates and allows the offline analysis to take advantage of the higher luminosity. Higher trigger latency will provide more time for the online data analysis. The silicon particle detection system for the Phase-2 upgrade of the tracker of the CMS experiment will be capable of providing information regarding the particle transverse momentum, in addition to simple geometrical positioning. Given a limited bandwidth, the use of tracking information for the event selection implies that the tracker has to send out self-selected information for every event requiring the front-end readout ASICs to locally perform an efficient data reduction. This functionality relies on the capability of on-chip continuous particle discrimination based on the particle transverse momentum and requires high-speed real-time communication among readout ASICs. Multiple ASICs have been designed and prototyped in advanced CMOS technologies to provide pixel and strip sensor readout, data aggregation and reduction, for the different layers of the upgraded tracker detector. Low-power and radiation tolerance design techniques have been employed to fulfil the very tight power requirement and radiation performances. After a detailed characterization of the functionalities, the ASICs have been tested for their capability to tolerate single-event radiation-induced effect (SEE) and their performances have been evaluated at high levels of total ionizing dose, to guarantee the capability of the tracker to operate up to 10 years without external maintenance. Automatizing production testing will allow selecting at wafer level the chips to be assembled for the detector. This contribution will focus on the architecture studies, the adopted technologies and solutions to fulfil the CMS tracker requirements and it will conclude with the results of the silicon prototypes and production run characterization.

        Speaker: Alessandro Caratelli (CERN, EPFL)
      • 29
        [C02] RD53 pixel chips for ATLAS and CMS phase II upgrades

        The RD53 collaboration is designing the pixel front end chips for the inner tracker detector upgrades of both ATLAS and CMS for High Luminosity operation at the Large Hadron Collider (LHC). This region is very challenging due to high event pileup, total ionising dose and single event effects. This contribution presents the chip design including analogue blocks, digital functions and protection against single event effects. It concludes with selected recent chip testing results.

        Speaker: Jaya John John (University of Oxford (GB))
    • 12:50 PM
    • monolithic: (1)
      Convener: .Yoshiyuki Onuki (University of Tokyo)
      • 30
        [D01] MuPix: an HV-MAPS for the Mu3e experiment

        Mu3e is an experiment based at PSI which searches for the charged lepton flavour violating decay µ→ eee with an aimed sensitivity of 1 event in 10^16 decays. The low energy of the decay products imposes harsh constraints to the momentum resolution and, ultimately, to the material budget. Among the several measures to minimize the material budget, the vertex detector adopts the HV-CMOS technology. Thanks to this, the chips can be thinned to 50 µm while keeping high efficiency and time resolution. In addition, the powering and data transmission is performed by means of kapton-aluminum High Density Interconnects, which serve as mechanical support as well. Starting from the detector concept, this talk will outline the challenges faced by the pixel detector chip, the MuPix, and the solutions adopted. Finally, the latest results from the R&D phase and the first detector prototypes will be shown.

        Speaker: Luigi Vigani (Ruprecht Karls Universitaet Heidelberg (DE))
      • 31
        [D02] Design and performance of the Monopix2 reticle-scale DMAPS with a column-drain read-out architecture

        The development of depleted monolithic active pixel sensors ("DMAPS") aims to meet the hit-rate and radiation-hardness requirements of tracker systems in modern and future particle collider experiments. These devices use multi-well commercial CMOS processes to integrate sensor, front-end and read-out electronics in a single piece of silicon. Their radiation tolerance is enhanced through design efforts and the use of large enough voltages in highly resistive substrates to collect charge mainly by drift.

        "LF-Monopix2" and "TJ-Monopix2" are the second generation of "Monopix" DMAPS prototypes fabricated in $\mathrm{150\,nm}$ and $\mathrm{180\,nm}$ CMOS processes, respectively. Both devices implement a fully functional column-drain read-out architecture at a reticle-size scale, but differ on the concept used for pixel design. LF-Monopix2 has each pixel’s full front-end and read-out circuitry placed and isolated inside a charge collection node of a size comparable to the pixel area. On the other hand, TJ-Monopix2 separates all electronics from its small electrode within the pixel and uses process modifications to enhance its charge collection capabilities. The chips inherited and improved radiation-hard designs tested in their direct predecessors, while also reducing their pixel sizes and increasing their active column lengths to $\mathrm{1.7}$ centimeters.

        The design and latest test results of unirradiated Monopix2 chips are presented. Their front-end performance was quantified according to their response to injected test pulses or radioactive sources. Moreover, a high and uniform in-time detection efficiency was measured on a test beam campaign for a successfully thinned-down and fully depleted LF-Monopix2.

        Speaker: Ivan Dario Caicedo Sierra (University of Bonn (DE))
      • 32
        [D03] Design and performance of RD50 DMAPS sensors for future colliders

        The CERN RD50 collaboration develops depleted monolithic active pixel CMOS sensors for future colliders with the aim of high radiation tolerance, good time resolution, and high granularity pixel detectors. The most recent prototype, the RD50-MPW3, is a 150 nm High Voltage CMOS LFoundry chip that features pixels with a 62 μm pitch that integrate both digital and analog readout electronics inside the sensing diodes. The 64 x 64 pixels on this chip are arranged in 32 double columns and have an optimized periphery for efficient configuration and fast serial data transmission. Post-layout simulations of a single pixel show a power consumption of 22 μW per pixel and 9 ns time walk.

        The predecessor of this version, the RD50-MPW2, was shown to be efficient in tests at beam facilities and to have a timing precision better than 1 ns before irradiation. It was evaluated at a fluence of $2\cdot 10^{15}$ n$_{\mathrm{eq}}$/cm$^2$. This talk will discuss the design of the latest advanced prototype, the MPW3, the performance of the MPW2, and the first results for the MPW3.

        Speaker: Jory Sonneveld (Nikhef National institute for subatomic physics (NL))
      • 33
        [D04] First Results of ATLASPix 3.1 Telescope

        ATLASPix is a high-voltage CMOS pixel sensor (HV-CMOS) designed as a candidate for the ATLAS Inner Tracker (ITk) upgrade. Using the commercial 180 nm CMOS process, they are more cost effective compared to hybrid pixel detectors. ATLASPix 3.1 has an area of 2$\times$2.1 cm$^2$, consisting of 150$\times$50 $\mu$m$^2$ pixels, each with a large n-well as charge collection electrode.

        With the ability to be operated in a multi-chip setting for ATLAS ITk, LHCb or other future collider experiments, a 4-layer telescope made of ATLASPix 3.1 was developed, using the GECCO readout system as for the single chip setup. To demonstrate the multi-chip capability and for its characterisation, a beam test was conducted at DESY using 3--6 GeV positron beams with the chips operated in triggerless readout mode with zero-suppression. In this contribution we will present the first results of the ATLASPix 3.1 beam telescope as well as the first quad module tested at the DESY testbeam.

        Speaker: Lingxin Meng (Lancaster University (GB))
      • 34
        [D05] Characterisation of neutron irradiated Digital Pixel Test Structures produced in 65 nm TPSCo CMOS process

        The ALICE Inner Tracking System has been recently upgraded to a new version (ITS2), which is entirely based on Monolithic Active Pixel Sensors (MAPS). For a future upgraded tracker, the ITS3, it is intended to replace the three innermost layers of the current ITS2 to further improve its position resolution. The proposed design features wafer-scale, ultra-thin, truly cylindrical MAPS. In order to benefit from the smaller feature size and the larger available wafers, the foreseen sensors are planned to be produced in 65 nm CMOS technology.

        An extensive R&D programme is established in order to qualify this technology for the application in MAPS. As one of the first steps towards a new pixel sensor, a Digital Pixel Test Structure (DPTS) has been designed and produced. Several of these prototypes are characterized in laboratory measurements and beam test campaigns at DESY and CERN. Furthermore, a subset of them has been neutron irradiated to different levels ranging from $10^{13}$ to $10^{16}$ 1 MeV $\mathrm{n}_{\mathrm{eq}}/\mathrm{cm}^2$ in order to study effects of radiation damage on the sensor performance.

        Results from the sensor characterisation are presented focussing on detection efficiency and position resolution. The outcome of these studies is encouraging for the application of the 65 nm CMOS technology in future MAPS-based detectors.

        Speaker: Pascal Becht (Ruprecht Karls Universitaet Heidelberg (DE))
    • 3:35 PM
    • monolithic: (2)
      Convener: .Yoshiyuki Onuki (University of Tokyo)
      • 35
        [D06] R&D status of monolithic SOI pixel sensor for vertex detector

        SOI wafer consists of a high-resistive handle wafer and a CMOS LSI circuit layer, and these two layers are isolated by a Silicon oxide layer. The handle wafer corresponds to the radiation sensor.
        Produced charges in the sensor are read out through tungsten VIA to the circuit. Sensor thickness can be changed from 500 to 50 um according to application. This allows the fabrication of complex circuits in a small pixel since there is no mechanical bonding like a hybrid-type silicon detector. We will introduce the recent R&D status of SOI sensors.

        Speaker: Akimasa Ishikawa (KEK)
      • 36
        [D07] The monolithic ASIC for the high precision preshower detector of the FASER experiment at the LHC

        The FASER experiment at the LHC will be instrumented with a high precision W-Si preshower to identify and reconstruct electromagnetic showers produced by two O(TeV) photons at distances down to 200µm. The new detector will feature a monolithic silicon ASIC with hexagonal pixels of 65 µm side, extended dynamic range for the charge measurement and capability to store the charge information for thousands of pixels per event. The ASIC will integrate SiGe HBT-based fast front-end electronics with O(100) ps time resolution. Analog memories inside the pixel area will be employed to allow for a frame-based event readout with minimum dead area. The design of the monolithic ASIC and the testbeam results of the pre-production ASIC will be presented together with a description of the pre-shower and its expected performance.

        Speaker: Didier Ferrere (Universite de Geneve (CH))
      • 37
        [D08] Development of the radiation hard MALTA CMOS sensor for tracking applications

        The MALTA family of DMAPS produced in Tower 180 nm CMOS technology targets
        radiation hard applications for the HL-LHC and beyond. Several process modifications and front-end improvements have resulted in radiation hardness up to 3e15 n/cm2 and time resolution below 2 ns, with uniform charge collection efficiency across the Pixel of size 36.4 × 36.4 𝜇m2 with a 3 𝜇m2 electrode size. The MALTA2 demonstrator produced in 2021 on high-resistivity epitaxial silicon and on Czochralski substrates implements a new cascoded front-end that reduces the RTS noise and has a higher gain. This contribution will show results obtained on MALTA2 sensors in beam tests of unirradiated and irradiated sensors and demonstrate timing resolution at the nanosecond level from the CERN SPS test-beam campaign of 2021. For future applications as tracking detectors at HL-LHC a new on-sensor hit time-tagging digital logic is currently being develop for the MALTA3 sensor to allow <1ns time-tagging of hits arriving from the asynchronously operated pixel matrix. The concept of this time-tagging sensor back-end will be presented at the end of the presentation.

        Speaker: Heinz Pernegger (CERN)
    • Detector R&D
      Convener: Hans-Gunther Moser (Max Planck Society (DE))
      • 38
        [E01] RD50 program
        Speaker: Christopher Betancourt (University of Zurich (CH))
      • 39
        [E02] Development of innovative SiC detectors for harsh environments

        Harsh environments such as related to ionizing radiation and high temperature conditions can seriously degrade electronic devices. For example, their levels in next-generation fusion reactors, such as ITER, can severely compromise or even cause permanent failure of many key diagnostics devices that are presently used in D-D magnetically-confined fusion plasma devices. Therefore, expected impact of this project applies on space applications, homeland security, radiotherapy (Flash therapy conditions), HEP experiments (such as at CERN) and environmental monitoring.
        This talk proposes to develop innovative radiation detectors that can be robustly operated in harsh environments. It requires the use of advanced microelectronic technology together with nanotechnology, and therefore, outcomes include the definition of completely new processing sequences. This new approach considers exploring novel uses and functionalities of 2D materials, such as the use of graphene in electrical contacts or alternative detection principles and signal management. The objective of this new development is to fabricate radiation detectors based on wide bandgap materials that can withstand high temperature (up to 500 ºC) and/or high radiation fluences (up to 1E16n/cm2).
        In this talk, I will present the preliminary results of the electrical and charge collection studies of SiC detectors fabricated at Centro Nacional de Microelectrónica (CNM-CSIC) in Spain at high temeperatures and in Flash rtherapy conditions.

        Speaker: Dr Giulio Pellegrini (Centro Nacional de Microelectrónica (IMB-CNM-CSIC) (ES))
      • 40
        [E03] Recent Developments of Diamond Detectors

        Detectors based on Chemical Vapor Deposition (CVD) diamond have been used successfully in beam conditions monitors in the highest radiation areas of the LHC. Future experiments at CERN will accumulate an order of magnitude larger fluence. As a result, an enormous effort is underway to identify detector materials that can operate after fluences of 10^{16}/cm^2 and 10^{17}/cm^2.
        Diamond is one candidate due to its large displacement energy that enhances its radiation tolerance. Over the last 2 years the RD42 collaboration has constructed diamond detectors in CVD diamond with a planar geometry and with a 3D geometry to extend the materials' radiation tolerance. The ATLAS Beam Conditions Monitor Prime (BCM') has both planar and 3D designs in order to be able to monitor the luminosity as well as protect the inner silicon detector of ATLAS. Due to the large range of particle flux through the detector, flexibility is very important. To satisfy the constraints imposed
        by the HL-LHC, our solution is based on segmenting each single diamond
        sensor into multiple devices of varying size and reading them out with a new multichannel readout chip. In this talk we describe the proposed system design and present beam test results from CERN using the MALTA telescope from the first detectors fabricated using our prototype ASIC. The ATLAS BCM' also includes 3D devices where the columns are fabricated using laser techniques. The 3D cells in our detectors have a size of 50µm x 50µm with columns 2.6µm in diameter and 100µm x 150µm with columns 4.0µm in diameter. A description of the production techniques used to produce these devices and beam test results for detectors will also be presented.

        Speaker: Harris Kagan (Ohio State University (US))
    • 7:00 PM
    • 7:00 AM
    • 9:30 AM
      workshop photo
    • 10:00 AM
      excursion: lunch is in Kamogawa Sea World, dinner in a Japanese diner. No meal prepared for those not attending the excursion

      lunch is at Kamogawa Sea World
      dinner is at Japanese Restaurant [Waka-Suzu]

    • 7:00 AM
    • Timing Detector: (1)
      Convener: Koji Nakamura (High Energy Accelerator Research Organization (JP))
      • 41
        [F01] A High-Granularity Timing Detector for the ATLAS Phase-II upgrade

        The increase of the particle flux at the HL-LHC with instantaneous luminosities up to L ≃ 7.5 × $10^{34}$ cm$^{−2}$s$^{−1}$ will have a severe impact on the ATLAS detector performance. The forward region where the liquid Argon calorimeter has coarser granularity and the inner tracker has poorer momentum resolution will be particularly affected. A High Granularity Timing Detector (HGTD) will be installed in front of the LAr end-cap calorimeters for pile-up mitigation and luminosity measurement. The HGTD is a novel detector introduced to augment the new all-silicon Inner Tracker in the pseudo-rapidity range from 2.4 to 4.0, adding the capability to measure charged-particle trajectories in time and space. Two silicon-sensor double-sided layers will provide precision timing information for MIP particles with a resolution of 30 ps per track in order to assign each particle to the correct vertex. Readout cells have a size of 1.3 × 1.3 mm2 leading to a highly granular detector with 3.7 million channels. Low Gain Avalanche Detectors technology has been chosen as it provides suitable gain to reach the large signal over noise ratio needed. Requirements and overall specifications of the HGTD will be presented as well as the technical design and the project status. The on-going R&D effort carried out to study the sensors, the readout ASIC, and the other components, supported by laboratory and test beam results, will also be presented.

        Speaker: Mengqing Wu (Radboud University and Nikhef (NL))
      • 42
        [F02] Performance studies of the Low Gain Avalanche Detectors for the ATLAS High Granularity Timing Detector in beam tests

        The significant increase of pileup interactions is one of the main experimental challenges for ATLAS detector physics program during the High Luminosity (HL) LHC operation phase. The nominal operation scenario expects to have an average of 200 simultaneous proton-proton interactions (〈μ〉 = 200) in each bunch crossing. The reconstruction and trigger performance for physics objects will be severely degraded in the end-cap and forward region, where the liquid Argon based electromagnetic calorimeter has coarser granularity and the inner tracker has poorer momentum resolution compared to the central region. The High Granularity Timing Detector (HGTD), is designed for the pile-up effects mitigation in the forward region and for bunch per bunch luminosity measurements. HGTD, based on low gain avalanche detector (LGAD) technology and covering the pseudorapidity region between 2.4 and 4.0, will provide the high precision timing information to distinguish between collisions occurring close in space but well-separated in time. Apart from being radiation resistant, LGAD sensors should deliver 30 ps time resolution per track for a minimum-ionising particle at the start of lifetime, increasing to 75 ps at the end of HL-LHC operation. In this talk, I will present the performances of several unirradiated, as well as neutron irradiated, LGAD sensors from different vendors studied with the test beams in 2022 at CERN SPS and DESY. This study covers the promising results in terms of collected charge, time resolution and hit efficiency of LGADs. A time resolution of < 75 ps is observed in most cases for highly irradiated sensors (2.5e15 neq/cm^2), while integrating timing information to the EUDET system allows for a surface resolution of less than 50 μm. The triggering architecture, picosecond synchronisation scheme and analysis logic will also be presented as well as application-specific electronics and components.

        Speaker: Valentina Raskina (LPNHE Paris, Sorbonne Université)
      • 43
        [F03] LHCb Tracker upgrade for the 2030s

        LHCb has recently submitted a physics case for an Upgrade II detector to begin operation in 2031. The upcoming upgrade stage is designed to run at instantaneous luminosities of up to $1.5 \times 10^{34} cm^{-2}s^{-1}$, and accumulate a sample of more than 300 fb$^{-1}$. At this intensity, the mean number of interactions per crossing would be 42, producing around 2000 charged particles within the LHCb acceptance. To meet this challenge, precise timing information will be added to the vertexing and tracking systems.

        In particular, the LHCb upgrade physics programme is reliant on an efficient and precise vertex detector (VELO). The higher luminosity poses significant challenges which need the construction of a new VELO with enhanced capabilities. Compared to the currently installed detector, the data rate will be 10 times higher with corresponding increases in radiation doses and occupancies. To cope with the large increase in pile-up, new techniques to correctly assign each b hadron to the primary vertex from which it originates, and to perform the real time pattern recognition, are needed. To solve these problems a new 4D hybrid pixel detector with enhanced rate and timing capabilities in the ASIC and sensor will be developed.

        Improvements in the mechanical design of the Upgrade II VELO will also be needed to allow for periodic module replacement. The design will be further optimised to minimise the material budget before the first measured point on a track (which is dominated by the RF foil) and to achieve a more fully integrated module design with thinned sensors and ASICs combined with a lightweight cooling solution. As well as improving the VELO performance, quantified by the impact parameter resolution, these changes will be beneficial both in improving the momentum resolution of the spectrometer and reducing the impact of secondary interactions on the downstream detectors.

        This presentation will show the most promising technologies to be used in the future upgrade for the HL-LHC, with emphasis on the timing precision as a tool for vertexing in the next generation detectors.
        The most recent results from beam tests motivated by time measurements will be presented together with the possible R\& D scenarios for the future upgrade.

        Speaker: Vagelis Gkougkousis (CERN)
      • 44
        [F04] Timepix4 timing performance and first beam test results

        Timepix4 is the latest generation in the Timepix family of ASICs. It has a pixel matrix of 512 by 448 pixels with a size of 55 by 55 μm, where each individual pixel measures the arrival time of the hits via leading edge discrimination. The TDC is constructed of four phase-shifted 640 MHz clocks to achieve a time bin size of 195 ps and a nominal time resolution of 60 ps. Besides the time of arrival, also the time-over-threshold (ToT) is measured to determine the amount of integrated signal charge. The charge-sensitive amplifier in the front-end has a constant discharge current to establish a linear relationship between the ToT and signal charge. For signals of more than 4000 electrons, the ToT resolution is better than 5%. The ASIC can be tiled on four sides, and can handle a rate of 360 Mhits/cm²/s. The time resolution of both the digital and analog front-end has been determined using lab measurements and will be presented. A beam telescope has been constructed and is in the early stages of operation. Test beam results acquired at the SPS will also be presented.

        Speaker: Kevin Heijhoff (Nikhef)
      • 45
        [F05] Performance of the LGAD-based in-beam detector at HADES

        The recently emerged Low Gain Avalanche Diode (LGAD) sensor technology is optimized to measure single particles with an excellent timing precision and with a high spatial granularity. These properties, paired with a low material budget and a high radiation hardness, make LGADs viable candidates not only for 4D particle tracking, for example in high energy physics experiments and medical applications, but also for beam monitoring and reaction time determination.
        For the latter applications, the High Acceptance Di-Electron Spectrometer (HADES) experiment has designed and used an in-beam detector consisting of FBK LGAD strip sensors in a high-intensity (10$^8$ p/s) pp production beam time in February 2022. The sensors with 96 half-strips were successfully used for beam position and macro- and micro-spill structure monitoring during the experiment. Moreover, the LGAD-based in-beam detector is foreseen to assist in particle identification by enabling a precise reaction time determination.
        After introducing the LGAD-based HADES in-beam detector and the sensors it consists of, first results of its performance will be shown. In addition, future prospects and developments will be discussed.

        Speaker: Wilhelm Krüger (Technical University Darmstadt)
      • 46
        [F06] The power of resistive read-out in thin silicon sensors with internal gain

        In this contribution, I will review the performance improvements that two design innovations, low-gain (LGAD) and resistive read-out (RSD), have brought to silicon sensors. Large signals lead to improved temporal precision (~ 30 ps), while charge sharing allows for achieving excellent spatial resolution (20 microns) with large pixels (~ 1 x1 mm2). LGAD- and RSD- based silicon sensors are now adopted, or considered, in several future experiments and are the basis for almost every next 4D-trackers.
        I will present new results, obtained with sensors belonging to the second FBK production of RSD, that demonstrate how a combined resolution of 30 ps and 30 microns can be obtained with pixels as large as 1 x 1 mm2.

        Speaker: Francesco Moscatelli (IOM-CNR and INFN, Perugia (IT))
    • 11:00 AM
    • Timing Detector: (2)
      Convener: Koji Nakamura (High Energy Accelerator Research Organization (JP))
      • 47
        [F07] The rise of 4D silicon detector

        Several anomalies have recently emerged in high energy physics experiments leading us to believe that discoveries are at reach in the next generation of collider physics experiments, however, for their success, technological advances are critical. Among them, 4-dimensional (4D) detectors that provide high-resolution space and time measurements in a single device are in growing demand, and will impact scientific research beyond high energy physics, e.g. nuclear physics, rare processes detection, space science, photon science etc. The fast-time silicon technology, namely LGAD, developed for the timing detectors at the High Luminosity LHC can be used as a stepping stone to reach <30 ps time resolution and <5 micron space resolution in a single device that also features low material budget and low power dissipation, and can be operated in a relatively high radiation environment. The seminar will illustrate the need for 4D detectors in a broad range of current and future scientific experiments, and will detail the progress made, as well as the one expected in the near future, in LGAD-based technologies to meet the stringent requirements of such experiments. This presentation will focus on recent advances made in the design, fabrication, performance characterisation and read out of AC-LGAD (AC-coupled LGAD) sensors for multiple scientific applications and will demonstrate that it is a mature technology for 4D detectors in the immediate future.

        Speaker: Dr Alessandro Tricoli (Brookhaven National Laboratory (US))
      • 48
        [F08] Development of AC-LGAD detector with finer pitch electrodes for high energy physics experiment

        Low-Gain Avalanche Diode (LGAD) sensor is one of candidate sensors for tracker at future hadron collider. To use this sensor as tracking detector, AC-LGAD sensor was developed which has both timing and spatial resolution. In high luminosity environment, a 30ps of timing resolution and O(10um) spatial resolution helps to reduce pileup effect and reconstruct tracks precisely. By optimization fabrication parameters, 80um pitch strip and 100um pitch pixel sensors are successfully produced. In this talk, I will present the performance of fine electrode pitch sensors such as pulse height, crosstalk size, timing resolution, inter electrode capacitance and radiation hardness evaluated using a beta-ray source and in 800MeV electron testbeam.

        Speaker: Sayuka Kita (University of Tsukuba(JP))
      • 49
        [F09] TCAD simulations of innovative Low-Gain Avalanche Diodes for particle detector design and optimization

        In this work the results of Technology-CAD (TCAD) device-level simulations of non-irradiated and irradiated Low-Gain Avalanche Diode (LGAD) detectors will be presented. Since LGADs are becoming one of the most promising devices for high performance particle detector in harsh radiation environments, it is of the utmost importance to have a predictive insight into their electrical behavior and charge collection properties up to the highest particle fluences reachable, for example, in the future High Energy Physics (HEP) experiments. To this purpose, state-of-the-art Synopsys Sentaurus TCAD tools have been adopted and equipped with a well-validated radiation damage numerical model, called the “University of Perugia model”. The model has been coupled with an analytical description of the peculiar mechanism of acceptor removal in the multiplication layer affecting irradiated LGAD devices. Thanks to this, it has been possible to reproduce experimental data with high accuracy, demonstrating the reliability of the implemented simulation framework. Moreover, the good agreement obtained between simulation results and experimental data has allowed us to apply the newly developed model for the optimization of two innovative paradigms for the design of LGAD sensors for 4D tracking, namely i) compensated LGAD and ii) DC-Coupled Resistive Silicon Detectors (DC-RSD) LGADs. The first option refers to new design of the gain layer implant that, by combining p+ and n+ dopants, has the potential to maintain a constant active doping density after very high irradiation. The second option is an evolution of RSD design that employs DC read-out with low resistivity strip between collecting pads. The obtained results will provide all the necessary information for the design of the first batch production of “compensated LGAD” and DC-RSD at Fondazione Bruno Kessler (FBK) foundry in Trento, Italy.

        Speaker: Francesco Moscatelli (IOM-CNR and INFN, Perugia (IT))
      • 50
        [F10] TimeSPOT results on sensors and electronics and future perspectives

        The TimeSPOT project has developed fast sensors and electronics for the readout of radiation-hard 4D pixels for vertex detectors of the next generation of experiments at colliders. In this paper, results about 3D silicon sensors, fabricated according to a so-called 3D-trench geometry, are illustrated. 3D-trench sensors have shown an intrinsic time resolution around 10 ps even after an integrated fluence of 2.5 10^16 1 MeV neutron equivalent per cm^2. Moreover, results from the test of a first read-out ASIC prototype, fabricated in CMOS 28-nm technology, are illustrated. The ASIC integrates a matrix of 32x32 pixels, 55 µm pitch. Each channel integrates one fast amplifier, one discriminator and one TDC. Measured time resolutions are in the range of 30ps. Next steps of dedicated developments on sensors and electronics, presently at their initial stage, will be also addressed in the paper.

        Speaker: Adriano Lai (Universita e INFN, Cagliari (IT))
      • 51
        [F11] MONOLITH - picosecond time stamping capabilities in fully monolithic highly granular silicon pixel detectors.

        The MONOLITH ERC Advanced project aims at producing a monolithic silicon pixel ASIC with 50µm pixel pitch and picosecond-level time stamping. The two main ingredients are low-noise, fast SiGe BiCMOS electronics and a novel sensor concept, the Picosecond Avalanche Detector (PicoAD). The PicoAD uses a multi-PN junction to engineer the electric field and produce a continuous gain layer deep in the sensor volume. The result is an ultra-fast current signal with low intrinsic jitter in a full fill factor and highly granular monolithic detector. A proof-of-concept ASIC prototype confirms that the PicoAD principle works according to simulations. Testbeam measurements show that the proof-of-concept prototype is fully efficient and achieves time resolutions of 17ps averaged on the pixel surface, with 13ps at the center of the pixel and 25ps at the pixel edge.

        Speaker: Prof. Giuseppe Iacobucci (Universite de Geneve (CH))
    • 1:35 PM
    • Future Experiments: & non HEP detector
      Convener: Kazuhiko Hara (University of Tsukuba (JP))
      • 52
        [G01] The 100μPET project: a small-animal PET scanner for ultra-high-resolution molecular imaging with monolithic silicon pixel sensors

        Recent developments in semiconductor pixel detectors allow for a new generation of positron-emission tomography (PET) scanners that, in combination with advanced image reconstruction algorithms, will allow for a few hundred microns spatial resolutions. Such novel scanners will pioneer ultra-high-resolution molecular imaging, a field that is expected to have an enormous impact in several medical domains, neurology among others. The University of Geneva, the University Hospital of Luzern and the École Polytechnique Fédérale de Lausanne have launched the 100µPET project that aims to produce a small-animal PET scanner with ultra-high resolution. This prototype, which will use a stack of 60 monolithic silicon pixel sensors as a detection medium, will provide volumetric spatial resolution one order of magnitude better than today’s best operating PET scanners. The R&D on the optimisation of the monolithic pixel ASIC, the readout system and the mechanics, as well as the simulation of the scanner performance, will be presented.

        Speaker: Giuseppe Iacobucci (Universite de Geneve (CH))
      • 53
        [G02] Latest vertex and tracking detector developments for the future Electron-Ion Collider

        The high-luminosity high-energy Electron-Ion Collider (EIC) to be built at Brookhaven National Laboratory (BNL) will provide a clean environment to study several fundamental questions in the high energy and nuclear physics fields. A high granularity and low material budget vertex and tracking detector is desired to provide precise measurements of primary and displaced vertex, track momentum and spatial projections. The EIC detector 1 collaboration has been formed to develop the technical design for the EIC project detector at the first Interaction Point (IP) towards its construction and operation. The reference design of the EIC vertex and tracking detector consists of the Monolithic Active Pixel Sensor (MAPS) based silicon vertex and tracking subsystem, the Micro-Pattern Gas Detector (MPGD) based gas tracking subsystem and the AC-Coupled Low Gain Avalanche Detector (AC-LGAD) based silicon outer tracker in the pseudorapidity region of -3.5 to 3.5 with full azimuthal coverage. Further detector geometry optimization and technology down selection are under study by the EIC detector 1 collaboration. The latest EIC tracking detector geometry and its performance evaluated in simulation will be presented. Details about the R$\&$D status and progress of the proposed detector technologies, detector mechanical design and readout options will be discussed as well.

        Speaker: Xuan Li (Los Alamos National Laboratory)
      • 54
        [G03] Tracking and vertexing challenges at a multi-TeV Muon Collider

        A Muon Collider with the centre-of-mass energy ranging from 1.5 TeV to 10 TeV has gained a lot of interest in the recent years thanks to its unique combination of high energy reach, clean final states and low environmental footprint. In particular, discovery potential of the 100 km-long FCC-hh collider could be achieved with a more compact circular tunnel at a fraction of power consumption. These unique features of the Muon Collider come at a cost of extremely intense beam-induced background creating very high occupancy throughout the detector, especially in close vicinity to the interaction region – up to 1000 hits/cm^2 in the innermost vertexing layers. This not only poses challenging requirements for position-sensitive detector technologies, but also calls for a new approach to data acquisition and particle reconstruction that exploits some of characteristic features of the background particles.
        This contribution will present the main technical aspects of the Muon Collider, focusing on the implications of beam-induced background for the design and performance of the vertexing detector. Simulation studies of the 1.5 TeV and 10 TeV Muon Collider designs will be compared, showing the top-priority directions in detector and software R&D, as well as the synergies with the ongoing efforts towards HL-LHC. These include the ps-level timing capabilities, directionality information, 4D track reconstruction with regions of interest, and others.

        Speaker: Nazar Bartosik (Universita e INFN Torino (IT))
      • 55
        [G04] Overall R&D status on the vertex and tracking semiconductor detectors for the ILC

        Construction of linear e$^+$e$^-$-colliders has been proposed as a high-precision complement to the LHC and HL-LHC. The advantages of such a collider are a well-defined initial state with a tunable centre-of-mass energy, a clean environment with small backgrounds compared to hadron collisions, and the possibility of using highly polarised beams. This enables precision studies of Higgs couplings, as well as the potential for studies of physics at higher energies with unprecedented sensitivity.
        The international linear collider (ILC) is a proposed accelerator for such e$^+$e$^-$-collisions, designed with upgradeable collision energy in mind. The ILC has two proposed detectors, named ILD and SiD. This talk will focus on silicon technology developments suitable for use in the tracking systems of the two detectors, meeting the tracking requirements posed on them by physics studies. This includes both state-of-the-art developments in silicon sensors, and new developments in support structures and cooling. While the environment and detector requirements at linear colliders differs from experiments at the LHC, technology developments based on upgrades of those experiments can be very beneficial also for use in a linear collider setting. The talk will go into some detail about different silicon sensor technologies, with a focus on monolithic pixel detector developments.

        Speaker: Håkan Wennlöf (Deutsches Elektronen-Synchrotron (DE))
    • 56
      Summary Talk
      Speaker: Kazuhiko Hara (University of Tsukuba (JP))
    • 57
      Closing of workshop sessions
      Speaker: Koji Nakamura (High Energy Accelerator Research Organization (JP))
    • 6:00 PM
      workshop dinner
    • 7:00 AM
    • 58
    • proceedings