Increasing demands for readout channel numbers as well as general rate capability finally iniciated a push for on-chip integration of front-end electronics
in the thermal neutron scattering community as well. The typical neutron scattering application introduces the additional challenge of generally asynchronous, poisson distributed events. To address the statistical nature of neutron events, a novel self triggered, entirely data driven, derandomizing and sparsifying readout architecture was developed and cast in silicon as a 128 channel neutron detector readout chip. The analogue pre-amplifier and shaping circuit was designed for a noise performance below 1000 ENC at 30 pF input capacitance. The ASIC provides readout bandwidth for an average signal rate of upto 32MHz, where pulse hight, time of incidence and channel number are registered. Though engineered for a specific application, these specifications correspond perfectly well to the demands imposed upon a front-end when MIPs are to be detected in typical silicon strips.
Additionally, the data driven and sparcifying readout architecture turned out to attract considerable attention in the heavy ion community of the future FAIR project, where mere event rates and multiplicities due to signal latencies impede the installation of any low level trigger facilities. n-XYTER has grown to be the readout ASIC prototype for FAIR and
in particular the CBM as well as the PANDA experiments. It will on one hand serve the basis for a dedicated ASIC development and on the other hand it will be employed for the broad detector prototyping efforts that have just started.
The first dies of the n-XYTER ASIC are currently under thorough and intensive tests, so that the test results on operation and performance will be presented.
'This research project has been supported by the European Commission under the 6th Framework Programme through the Key Action: Strengthening the European Research Area, Research Infrastructures. Contract n°: RII3-CT-2003-505925 '