Sep 26 – 30, 2011
Vienna, Austria
Europe/Zurich timezone

Electronics for the camera of the First G-APD Cherenkov Telescope (FACT) for ground based gamma-ray astronomy

Sep 27, 2011, 11:25 AM
Room EI 8 (Vienna, Austria)

Room EI 8

Vienna, Austria

<font face="Verdana" size="2"><b>Vienna University of Technology</b> Department of Electrical Engineering Gusshausstraße 27-29 1040 Vienna, Austria


Mr Patrick Vogler (ETH Zurich)


Within the FACT project, we construct a new type of camera based on Geiger-mode avalanche photodiodes (G-APDs). Compared to photomultipliers, G-APDs are more robust, need lower operation voltage and have the potential of higher efficiency and lower cost, but were never tested in the harsh environments of Cherenkov telescopes. The FACT camera consists of 1440 G-APD pixels and readout channels, based on the DRS4 analog pipeline chip and commercial Ethernet components. Preamplifiers, trigger system, digitization, slow control and power converters are integrated into the camera. I will present the FACT camera electronics and first experience gained.

Summary 500 words

Within the First G-APD Cherenkov Telescope (FACT) project, a camera based on Geiger-mode avalanche photodiodes (G-APD) for Imaging Atmospheric Cherenkov Telescopes has been designed and is currently under construction. Cherenkov telescopes are the workhorses in ground-based very high energy gamma-ray astronomy. Until now, G-APDs have never been tested and used in the harsh environments of Cherenkov telescopes.
Compared to the currently used photomultiplier tubes, G-APDs promise higher photon detection efficiency and have the potential for lower cost. They are smaller, more robust and operate at a much lower bias voltage. The FACT camera has 1440 pixels and the same number of readout channels. Preamplifiers, data acquisition, trigger electronics, slow control and low voltage power converters are integrated in the FACT camera.
The preamplifier and trigger unit and digitizing boards of the FACT camera have 36 channels each. There are 40 boards of each type, mounted in four crates, ten boards of each type per crate. In a crate, there is a midplane board interconnecting the other boards. The digitizing boards are based on the DRS 4 analog pipeline chip operated at a sampling rate of 2 GHz.
Data readout uses one Fast Ethernet (100 Mbit/s) interface per digitizing board.
There are two commercial Ethernet switches in the FACT camera collecting the data and transferring it to the DAQ computers over four Gigabit Ethernet links using optical fibres. The maximum possible datarate is expected to be approximately 200 MB/s.
The trigger system uses analog sums over trigger patches of 9 pixels with the possibility to exclude individual pixels from trigger generation. Each trigger unit comprises four patches with an trigger threshold set per patch. The forty trigger units are controlled by a single trigger master. This trigger master collects the trigger primitive signals from the trigger units to generate one trigger signal. It provides slow control functions for the trigger units and in addition generates the sampling clock for the digitizing boards and a trigger-ID for every event. The trigger master is also controlled over an Ethernet interface.
The trigger signal and the sampling clock are distributed to the digitizing boards with a jitter of less than 100 ps. The trigger-ID is broadcasted to the digitizing boards over a dedicated RS-485 bus.
There is one slow control board monitoring temperatures, humidities and supply voltages. The necessary low voltage power supply is provided by power converters integrated into the housing of the FACT camera. These switching-mode power converters are themselves powered by a single external 48V supply.
The total power consumption of the FACT camera is about 1kW. All components have been successfully tested.
In my talk, I will present an overview of the FACT camera electronics as well as laboratory results and first operation experiences.

Primary author

Mr Patrick Vogler (ETH Zurich)

Presentation materials