Sep 26 – 30, 2011
Vienna, Austria
Europe/Zurich timezone

Data acquisition electronics and reconstruction software for real time 3D track reconstruction within the MIMAC project

Sep 28, 2011, 11:25 AM
25m
Room EI 8 (Vienna, Austria)

Room EI 8

Vienna, Austria

<font face="Verdana" size="2"><b>Vienna University of Technology</b> Department of Electrical Engineering Gusshausstraße 27-29 1040 Vienna, Austria

Speaker

Mr Olivier Bourrion (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ)

Description

Directional detection of non-baryonic Dark Matter requires 3D reconstruction of low energy nuclear recoils tracks. A gaseous micro-TPC matrix, filled with either 3He, CF4 or C4H10 has been developed within the MIMAC project. A dedicated acquisition electronics and a real time track reconstruction software have been developed to monitor a 512 channel prototype. This auto-triggered electronic uses embedded processing to reduce the data transfer to its useful part only, i.e. decoded coordinates of hit tracks and corresponding energy measurements. An acquisition software with on-line monitoring and 3D track reconstruction is also presented.

Summary 500 words

The first step of the MIMAC project is to build 1m3 directional Dark Matter detector composed of micro-TPCs featuring 2x512 strips and their associated electronics. Precise measurement of each track is compulsory to achieve Dark Matter detection, i.e. energy measurement, 3D reconstruction and sense recognition. A dedicated acquisition electronics has been developed for this goal.
The prototype micro TPC is composed of a pixelized anode featuring 2 orthogonal series of 256 strips of pixels (X and Y) and a micromesh grid defining the delimitation between the amplification (grid to anode) and the drift space (cathode to drift). The location of the pixels fired is obtained by using the coincidence between the x and y strips (the pixel pitch is 350 µm). Then, the coordinates in the anode plane are reconstructed by collecting primary electrons produced in the drift region. Knowing the electron drift velocity, the third dimension is obtained by sampling the anode signal every 20 ns
The readout electronic comprises 8 dedicated ASICs, a FPGA, a flash ADC and an USB interface for DAQ and slow control interface.
The connection between the anode located inside the chamber and the electronics at ambient pressure is done via an airtight interface. 64 strips of pixels are monitored by one ASIC. Each channel is composed of a low noise charge sensitive preamplifier (CSP) followed by an auto zero amplifier and a current comparator whose threshold is set via a DAC. The 64 comparator outputs, providing the hit strip information, are sampled at a rate of 50 MHz and transferred by 8 LVDS serial links at 400 MHz to a processing FPGA. The connectivity being significantly reduced, a single FPGA is sufficient to equip one chamber. Also the power consumption and the generated EMI/RFI are reduced.
Inside the FPGA, the hit strip information issued by each ASIC, is deserialized and 'locally' processed, i.e time tagged and decoded. Then, successive processing state machine, coupled to cache buffers, are cascaded in order to concatenate the data issued from different ASICs and sides. At the end, the event containing the 3D track information, i.e. the 2D hit strip coordinates for each time slice, is made available for readout.
In order to perform precise energy measurements and to discriminate the sense of the track (head-tail), the output of a CSP monitoring the grid signal is acquired by a flash ADC. While keeping a very good energy resolution, an approximation of the charge deposit through time can be obtained off-line by deriving the digitized CSP signal.
The acquisition of this signal is triggered by the hit coincidence between strips of pixels from 2 sides. The time of this coincidence is used to tag the data and to allow the track information and energy association in the real-time acquisition software.
A USB2 microcontroller is used to implement the slow control and acquisition interface. Thus, one or several of the prototype board can be connected to a low cost small form factor computer providing a cheap and reliable Ethernet interface for data acquisition. Also, the microcontroller and the FPGA are remotely reconfigured at start up and no firmware is resident on the board.

Primary author

Mr Olivier Bourrion (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ)

Co-authors

Cyril Grignon (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ) Daniel Santos (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ) Frédéric Mayet (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ) Mr Germain Bosson (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ) Jean-Luc Bouly (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ) Jean-Pierre Richer (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ) Julien Billard (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ) Olivier Guillaudin (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ)

Presentation materials