Sep 26 – 30, 2011
Vienna, Austria
Europe/Zurich timezone

Flexible system of the CMS ECAL OD electronics firmware update

Sep 29, 2011, 4:00 PM
2h 30m
Vienna, Austria

Vienna, Austria

<font face="Verdana" size="2"><b>Vienna University of Technology</b> Department of Electrical Engineering Gusshausstraße 27-29 1040 Vienna, Austria
Poster Logic Posters

Speaker

Jose Carlos Rasteiro Da Silva (LIP Laboratorio de Instrumentacao e Fisica Experimental de Part)

Description

This poster describes the implementation of a flexible system for the electromagnetic calorimeter (ECAL) Off Detector (OD) electronics firmware update and the corresponding software tools designed to manage the update operation. The idea is to equip each ECAL VME64x crate with the new JTAG Distribution Board (JDB) that access XILINX and ALTERA FPGAs JTAG chains for trigger (TCC68/48) and data acquisition (DCC) boards. This solution allows:  Improve access flexibility and reduce the time needed to reprogram TCCs and DCCs firmware.  Increase mechanical safety, excluding any touching of the fragile fibers connected to OD electronics every time the update is perfomed;  Perform the firmware update via remote (VME-MTM) mode. New FPGAs programming code can be loaded to the OD electronics FPGAs through the specific Programming Cable from a dedicated PC connected to JDB or from VME-MTM bus. On the JDB there are three modes to select the JTAG path: First, manually, via a ten position switch placed on the front-panel. Second, from a PC through USB port. Third, the VME/JTAG interface implemented on a FPGA. The system has been installed in CMS counting room (USC55) and used for the firmware upgrades of the CMS electromagnetic calorimeter data acquisition and trigger system electronics.

Summary 500 words

On the Electromagnetic Calorimeter (ECAL) of the CMS Experiment , one of the four major experiments operating on the LHC particles accelerator, the Off Detector Unit interfacing with the ECAL detector contains the boards to process trigger, control and data. These boards are housed in 18 VME 9U crates, each containing several sets of the Data Concentrator Cards (DCC), Trigger Concentrator Cards (TCC) and Clock and Control System (CCS) cards. Each crate uses a VME64xp backplane to interface each board. The crates are placed in a cavern counting room (USC55), 100 meter underground.

Given the complexity and organization of the system, it is mandatory to consider remote reconfiguration techniques, in order to create a testable and upgradeable system not only during actual operation but also at other phases of the system lifetime.
To achieve these goals, a dedicated board, the JTAG Distributor Board (JDB), that controls the execution of the firmware upgrade operations within the crate was proposed, developed and fabricated. Each ECAL VME64x crate equipped with the new JTAG Distribution Board (JDB) that serves XILINX and ALTERA FPGAs programming for trigger (TCC68) and data acquisition (DCC) boards. This solution allows:
 Improve access flexibility and reduce the time needed to reprogram TCCs and DCCs firmware.
 Increase mechanical safety, excluding any touching of the fragile optical fibers connected to OD electronics every time the update is performed;
 Perform the firmware update via remote (VME interface) mode.
New FPGAs programming code can be loaded to the OD electronics FPGAs through a vendor specific Programming Cable connected to JDB or trough the VME interface.
For convenient work with this system the software tools for reconfiguration, using JTAG programming chains, was designed. One dedicated program of the JTAG path configuration is placed on Windows PC with main Xilinx and Altera programming suits. Another one is on the online Linux PC connected to JDB through VME bus. These programs make use of a terminal and GUI interactive interfaces. The most widely used format for remote programming is the SVF format and therefore it was chosen as the input to the system.

On the JDB there are three modes to select the JTAG programming path: First, manually, via a ten position switch placed on the front-panel. Second, from a PC through USB port. Third, the VME/JTAG interface implemented on a FPGA.

The designed system has been installed in CMS counting room (USC55) and used for the firmware upgrades of the CMS electromagnetic calorimeter data acquisition and trigger system electronics.

Primary author

Dr Anatoli Konoplyannikov (CERN/ITEP Moscow)

Co-authors

Presentation materials