17–21 Feb 2025
Vienna University of Technology
Europe/Vienna timezone

OBELIX: A DMAPS chip for the Belle II VTX Upgrade

19 Feb 2025, 10:40
50m
Vienna University of Technology

Vienna University of Technology

Gusshausstraße 27-29, 1040 Wien
Board: 86
Poster Semiconductor Detectors Coffee & Posters B

Speaker

Maximilian Babeluk (Austrian Academy of Sciences (AT))

Description

The OBELIX chip is specifically developed for the Belle II VTX upgrade and used as sensor on all VTX layers.
OBELIX is a depleted monolithic active pixel sensor in 180nm technology and based on the TJ-Monopix2 chip.

The pixel matrix of OBELIX is inherited from TJ-Monopix2, but the periphery of the chip is entirely reworked.
A newly designed 2-stage pixel memory matches Belle II trigger requirements, handling events with hit
rates up to 120MHz/cm2 at 10us latency. OBELIX includes LDO regulators for supply voltages to simplyfy the integration into a detector system and a precision timing module with less than 3 ns resolution. Furthermore, the OBELIX chip can also contribute to the BELLE II trigger system with low latency, low granularity real-time streaming of pixel data in parallel to regular operation.

Special care has been taken to ensure stable operation even in the presence of single event upsets (SEUs). The global configuration is self-correcting via hamming codes and critical finite state machines (FSMs) forsee triplication.
All FSMs in the data path are audited for SEU effects at a netlist level to ensure reliability even in case of faults, via a comprehensive simulation study.

This poster will highlight the key features of the OBELIX-1 chip, currently under development. Detailed updates on the design and implementation, as well as results of various performance simulations calibrated with real data from TJ-Monopix2
measurements will be presented.

Primary experiment Belle II

Author

Maximilian Babeluk (Austrian Academy of Sciences (AT))

Presentation materials