20–23 May 2025
CERN
Europe/Zurich timezone
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NDK: An open-source framework for high-speed network applications on FPGAs

20 May 2025, 17:25
30m
500/1-001 - Main Auditorium (CERN)

500/1-001 - Main Auditorium

CERN

400
Show room on map
Sharable HDL cores Sharable HDL cores

Speakers

Daniel Kondys (CESNET) Radek Iša (CESNET)

Description

CESNET (Czech Education and Scientific Network) has a long history of providing backbone connectivity and services to institutions such as universities and research centers. One of its subdivisions, tasked with monitoring network traffic, was already familiar with the FPGA technology when 100 GE networks emerged. Soon after, we developed our first FPGA-based network card and firmware to pre-process the monitored network traffic, marking the inception of the NDK (Network Development Kit) framework.
With Cesnet’s transition to 400G lines, network monitoring and the NDK framework also evolved. Aiming to quadruple the throughput, we opted to widen the datapaths instead of increasing the clock signal frequency. Wider datapaths led us to create a new concept of buses, enabling us to process multiple frames each clock cycle. With its software drivers, flexible build system, and the support of FPGAs from various vendors, the NDK is a suitable framework for a wide range of NIC applications.

Talk's Q&A During the talk
Talk duration 25'+12'
Will you be able to present in person? Yes

Author

Daniel Kondys (CESNET)

Co-author

Radek Iša (CESNET)

Presentation materials