Speakers
Description
ABT has several mixed gateware/software projects, such as its fast interlocks (FIDS) and kicker timing routing (KiTR) systems, that require a specific top-level design for each equipment (e.g. PS KFA45 injection pulse generators) while at the same time also sharing a set of common HDL cores and AXI bus architecture. Git submodules answer the need of common cores well, however also the top-level design, project structure and submodules have many commonalities.
To cater for this, a branch-per-equipment approach is currently used to reduce HDL duplication and porting efforts. An automated GitLab CI/CD multi-project pipeline ensures up-to-date simulation, synthesis, compilation, packaging and delivery when triggered, wich can happen at several levels. This lazy approach, with its advantages and disadvantages, is presented here.
| Talk's Q&A | End of talk |
|---|---|
| Talk duration | 15'+7' |
| Will you be able to present in person? | Yes |
