Speaker
Description
The Apparatus for Mesons and Baryon Experimental Research (AMBER, NA66) is a high-energy physics experiment at CERN’s M2 beam line at the Super Proton Synchrotron (SPS). Its broad physics program extends beyond 2032. Measurements of the anti-proton production cross-section on He, proton, and Deuterium to support the dark matter searches, the charge-radius of the proton to contribute to the solution of the puzzle in the values and the Kaon and Pion PDFs using Drell-Yan process are already approved for the initial part of the experiment. For this new apparatus we are designing together with the CERN MPT workshop both a resistive bulk MICRO-MEsh GAseous Structure (MM) detector and a new custom 64 channel fully digital front-end ASIC ToRA (Torino Readout for AMBER) for timing and energy measurements. The MM detector composed of three independent modules with an active area of 1x0.5 m² will cover a total acceptance of 1x1.5 m². Each module includes two readout planes in a face-to-face configuration enabling XUV coordinate measurements, the cathodes are implemented on a thinner common central PCB. For Lateral modules a uniform 10 MΩ/sq Diamond-Like Carbon (DLC) resistive layer is applied on top of the readout strips whereas the Central module is planned with a double DLC resistive configuration. The ToRA ASIC is closely tailored to the specifications of the MM but also suited to equip the existing Wire type detectors to make them compatible with the future trigger-less Data Acquisition system (DAQ) of AMBER. We must face the challenges of detecting 1.5-2.5 fC signals from AMBER Micromegas modules that will have a ~1.2x0.5 m^2 size with ~1.2 m long strips of up to ~500 pF capacitance and expected rates of up to 100-200 kHz/strip. The power consumption of the 65nm ToRA ASIC is expected to be around 10 mW/ch.
We present the results obtained from the first Lateral module both with TIGER ASIC based and ToRA ASIC based readouts in laboratory and beam test conditions. Design considerations and production challenges of the Central module will be discussed. Considerations on the ToRA v2 ASIC now in design phase will be presented.
| Name of the speaker | Maxim Alexeev |
|---|---|
| Eligible for the Georges Charpak Young Scientist Award. | no |