10 Gb/s Radiation-Hard VCSEL Array Driver

Jun 4, 2014, 11:00 AM
Graanbeurszaal (Beurs van Berlage)


Beurs van Berlage

Oral Data-processing: 3a) Front-end Electronics III.a FE & ASICs


Prof. Kock Kiam Gan (Ohio State University (US))


Planned upgrades to the LHC at CERN will increase its energy and luminosity. These advancements will require increasing the optical data communication bandwidth to fully exploit the accelerator and detector upgrades. This require much increased per-fiber output data rates of up to 10 Gb/s. While 10 Gb/s optical links are mature in industry, as yet there are none that have sufficient radiation hardness for the most challenging HEP deployments. We will present results from an R&D project to produce a radiation-hard VCSEL driver ASIC capable of 10 Gb/s operation per-channel. Commercial VCSEL arrays operating at 10 Gb/s are now readily available and have been proven to be radiation-hard in previous studies. Thus, the ultimate goal of the R&D is to develop an ASIC that contains a 12-channel array of 10 Gb/s VCSEL drivers. However, at this stage in our R&D we are targeting fabrication of a preliminary four-channel test chip in a 65 nm CMOS process. The four channels in the ASIC will be used to qualify the performance and radiation hardness of different driver topologies before settling on a preferred topology for the 12-channel ASIC. The ASIC will include an 8-bit DAC and band gap reference to be used for remotely controlling the VCSEL bias and modulation currents. We will present the circuit designs of the four-driver topologies included within the ASIC along with results from extracted layout simulations.

Primary author

Prof. Kock Kiam Gan (Ohio State University (US))

Presentation materials