University of Turku (FI)
Author in the following contributions
- The Charge Pump PLL Clock Generator Designed for the 1.56 ns Bin Size Time-to-Digital Converter Pixel Array of Timepix3 Readout Chip
- Design of the analog front-end for the Timepix3 and Smallpix hybrid pixel detectors in 130nm CMOS technology
- Digital Column Readout Architectures for Hybrid Pixel Detector Readout Chips
- A prototype hybrid pixel detector ASIC for the CLIC experiment
