Speaker
Description
Summary
Time stamping with picosecond accuracy is an emerging technique opening new fields for particle physics instrumentation. For example, it permits the localization of vertices with a few mm precision, can help associating particles coming from a common primary interaction even in a high background or can be used for particle identification using Time of Flight techniques. It has been demonstrated that ps timing accuracy can be reached by sampling the detector signal in ultrafast analogue memories using Switched Capacitor Arrays (SCA) [1, 2] for reasonable power, space and money budgets. Moreover, the knowledge of the signal waveform permits extracting other useful parameters as charge, pulse width or risetime and optimizing the timing extraction algorithm during or even after data taking. Contrasting with the existing fast sampler chips usually designed for all-purpose application and requiring external electronics to be used for accurate timing, the SAMPIC0 chip, presented here, has been designed specifically for this type of application. SAMPIC0 is actually a technological demonstrator, but already usable for measurements with detectors, which is intended to be improved in the future to allow deadtime free operation. This chip, designed in the 0.18µm CMOS technology from AMS, integrates 16 measurement channels that can be operated independently or using a common trigger. Each of the channels integrates a discriminator, a 18-bit deep TDC and a 64-cell deep SCA. A 64-step DLL, common to all the channels, provides the multiphase clock used in the SCA and the TDC. This step, tunable from 100ps to 1ns, defines the TDC step as well as the SCA sampling frequency (1 to 10 GSPS). The input analogue signal is continuously sampled and stored at up to a rate of 10 GSPS in the 1GHz bandwidth analogue memory until an event is detected by the discriminator. A trigger signal is then generated, freezing the analogue memory, timestamping the event in the TDC and rising a flag indicating that an event is waiting from conversion and readout. The analog to digital conversion of the waveforms is performed in parallel over 11 bits for all the cells of the channels having detected an event. For this purpose, a 2 GHz Wilkinson ADC is associated with each analogue memory cell. Once this operation is finished, the data can be readout, using a 400MHz 14-bit LVDS bus, starting by the TDC data then followed by the SCA waveform for which it is possible to send only a zone of interest corresponding to the pulse. Once the SCA data has been converted, the channel is available for a new event so that the deadtime from a given channel of SAMPIC0 is of only 1µs. One major benefit of the proposed architecture is that it can use a rather slow discriminator as the latter provides only a trigger signal and not the actual timing accuracy which is derived from the sampled waveform.
The final paper will describe the chip architecture with more details and will give report of the performances measured on prototypes.
[1] J.-F. Genat, G. Varner, F. Tang, H.J. Frisch, “Signal Processing for Pico-second Resolution Timing Measurements", Nucl. Instr. Meth. A 607 (2009) 387-393.
[2] D. Breton, E. Delagnes, J. Maalmi, K. Nishimura, L.L. Ruckman, G. Varner, J. Va'vra, “High Resolution Photon Timing with MCP-PMTs: A Comparison of Commercial Constant Franction Discriminator (CFD) with ASIC-based waveform digitizers TARGET and WaveCatcher", Nucl. Instr. Meth A 629 (2011) 123-132.
