Speaker
Dr
Jan-Rutger Schrader
(SRON Netherlands Institute for Space Research)
Description
In the FAIR project (Front-end ASIC for Infrared detector Readout), an IC is developed for the readout of state-of-the-art NIR/SWIR detectors for future Earth observation missions and astrophysics. The chip consists of a high-resolution ADC with integrated offset correction and adjustable gain, and voltage regulators to generate bias/reference voltages for the detector. The chip is designed to operate in an extremely large operating range from -218 degrees Celcius up to 50 degrees Celsius. The original mission goal was for the Exoplanet Characterization Observatory (EChO). In order to fulfil the challenging stability and low-noise requirements, the read-out electronics needed to be placed as close to the detector as possible, thus reducing electromagnetic interference (EMI) and gaining overall signal integrity. The close proximity to the cooled detector requires the read-out electronics to operate at an equally reduced temperature. Considering that the target atmospheric gases addressed by EChO - CH4, CO, CO2 and H2O - are the same as addressed by current and future in Earth-observation missions in the SWIR-IR spectral range (e.g. ESA Sentinel-5, ESA CarbonSat, CNES MicroCarb), it is clear that the FAIR chip also offers interesting opportunities for application in future Earth observation missions. The FAIR chip can be placed naturally into the existing electronic readout environment for application to other future IR detectors, replacing and significantly miniaturizing the analog electronics, fitting in the on-going trend of integration in detector electronics for space instrumentation in general: obvious advantages are the reduction of power consumption, volume and weight. The ADC has a 16-bit resolution and offers a sampling rate of 1 Megasample per second. It is designed for an ultra-low power consumption of 16mW. The ADC analog circuitry area is 2 square mm. Special analog layout techniques were used to ensure radiation hardness, and all digital circuitry was place&routed using the rad-hard IMEC DARE library.
Primary author
Dr
Jan-Rutger Schrader
(SRON Netherlands Institute for Space Research)
Co-authors
Dr
Daniel Schinkel
(Axiom IC Teledyne Dalsa)
Mr
Seyed Kasra Garakoui
(Axiom IC Teledyne Dalsa)
