Speaker
Yoshinobu Unno
(KEK)
Description
In order to utilize the SOI wafer such that the CMOS electronics is processed in the silicon layer (SOI) over the SiO2 insulator layer and the active sensor layer in the handle wafer below the insulator layer, a monolithic silicon detector without bump bondings. We have been developing pixel detectors in collaboration with industry to utilize its advanced technology on 0.15 µm and 0.20 µm rules. We report on the development status, radiation damage effect on the SOI transistors, and the latest demonstrators.
Author
Yoshinobu Unno
(KEK)
Co-author
SOIPIX collaboration
(KEK)
