A Liquid-argon Trigger Digitizer Board (LTDB) is being developed for the Phase-I trigger upgrade of the ATLAS Liquid Argon Calorimeters.
Several ASICs such as GBTx, optical transmitter/receivers, level translators and custom designed ADCs are mounted on the board to assure the functionalities of the LTDB. In a prototype version of the board multiple ARTIC FPGAs from Xilinx are implemented. All these devices require several different supply voltages and a well-specified power-up sequence. Furthermore, different analog circuits are also present on the LTDB.
The full functionality of the board requires considerable resources in terms of power distribution. For this reason a relatively large area of the board is reserved to it. Moreover, the LTDB has to operate in a hostile environment. Each component has to be tested for radiation and magnetic field tolerance, and special design techniques have to be applied. The most important aspects are basically those related to the reliability of the devices over time.
Supply circuits are particularly affected by hostile environment. For example, high magnetic fields can lead to malfunctions, failures and degradation of the performance of some switching power supplies. It was therefore considered useful to study these aspects carefully with the aim of being able to design power systems that can work reliably on the ATLAS detector.
We propose the use of Point of Load (PoL) DC/DC converters developed by CERN and denoted as FEASTMP. This device is able to assure optimal performance in the presence of both high magnetic fields and high level of radiations. The digital components on the LTDB require voltages between 1V and 4V and up to 10W of power each. The considered PoL provides a voltage range up to 12 V, a maximum output current of 4A and a maximum deliverable power of 10W. For the digital part of the LTDB board alone, 23 FEASTMPs are therefore needed. This entails considerable difficulties in the power dissipation of this large number of devices. As regards the analog part of the LTDB, LDO regulators have been proposed, but this aspect will not be covered here.
Furthermore, the LTDB needs, for some on-board devices, a supply voltage with a low level of residual ripple (less than 10 mV) which is being verified experimentally. It must be considered that the ripple may be affected by the value of the input voltage, by the value of the output voltage and, finally, by the output current. Some preliminary test confirm that the FEASTM can comply with these important requirements. The distance between the LTDB and the cooling plate lead also to consider investigating the possibility to modify the overall dimensions and shape of the device to fit the specific needs.
We will discuss the results obtained in the aforementioned research.