TWEPP 2015 - Topical Workshop on Electronics for Particle Physics

Details for Marek Idzik

Affiliation: AGH University of Science and Technology (PL)

Author in the following contributions

• Development of a low power Phase-Locked Loop (PLL) and Delay-Locked Loop (DLL) in 130nm CMOS technology
• Comparison of two fast, ultra-low power 10-bit SAR ADCs in CMOS 130 nm A and B technologies
• A fast multichannel, ultra-low power 10-bit ADC for readout of future particle physics detectors