Speaker
Dr
Sabina Ronchin
(ITC-irst, Trento, Italy)
Description
Recently, increased attention has been given to 3D detectors owing
to their capability to control the depletion mechanism by acting on
the layout of the vertical electrodes only. Depletion voltages two
orders of magnitude lower and collection times one order of
magnitude lower than those of standard planar detectors [ ] can be
obtained, by properly designing the electrodes width and pitch. This
feature is of particular interest for detectors to be employed in
extremely hard radiation environments, as the one foreseen for the
Super-LHC.
In the 3D architecture proposed by S.I. Parker et al. [1], columnar
electrodes of both doping types are arranged in adjacent cells. The
path of the electric field lines begins at one electrode type and
ends at the closest electrode of the opposite type in parallel with
the detector surface. Acting on the bias voltage the strength of the
electric field can be tuned. The fabrication process of 3D detectors
is rather long and requires several steps that are not commonly used
in standard detector technology. This makes future mass production
of 3D devices very critical as far as the fabrication yield and the
costs are concerned.
In a previous work [ ] we presented a new 3D detector architecture
(3D-stc) aimed at simplifying the manufacturing process making it
more suitable for high volume production. In particular, the
proposed device features electrodes of one doping type only, e.g.,
n+ columns in a p-type substrate. The main advantage is that the
column etching and doping are performed only once, a fact that
provides a considerable process simplification. A drawback of the
proposed structure is that it prevents from controlling the electric
field strength with the applied voltage when full depletion is
reached. The only way to control the electric field is by selecting
the appropriate substrate doping concentration. As a result, the low-
field regions may have a larger extension with respect to the
original 3D detector design. Several tests have been performed to
verify the feasibility of single process steps.
In this work we present the layout and the fabrication process used
to realize the first prototypes of 3D-stc.
The device process is going to be completed in June 2005, therefore
preliminary results of the electrical characterization will be
presented at the conference.
Primary author
Dr
Sabina Ronchin
(ITC-irst, Trento, Italy)