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Description
HEPS-BPIX is a dedicated hybrid pixel detector for the High Energy Photon Source in China. It works in the single photon counting mode, and each pixel chip contains an array of 10472 pixels with a pixel size of 150um150um. Based on the successful design of the chip, the detector module was assembled by bump bonding with 24 pixel chips and a single large sensor. Six detector modules were then mounted as the final prototype system, covering an area of 9cm10cm with 360k pixels. Experiment and calibration results are discussed in this paper.
Summary
The High Energy Photon Source (HEPS) will be the next generation of light source in China and the Test Facility is now being built. However, the existing pixel detector cannot fulfill the requirement in applications like diffraction experiments and protein crystallography, especially for frame rate and dead-time performance. HEPS-BPIX is a dedicated hybrid pixel detector for HEPS. It works in the single photon counting mode with a 300um-thick P-in-N sensor bump bonded with Indium.
With 3 years effort, the readout chip was successful designed and manufactured by a full mask tapeout. The chip contains an array of 104 × 72 pixels with a pixel size of 150µm×150µm. Each pixel runs a 20-bit counter and can be readout at 1.2kHz frame rate with negligible deadtime.
After the full test with the single chip module, i.e., one readout chip bump bonded with a sensor containing a pixel array with the same size, the detector module was finally assembled with 24 chips. Each detector module consists of 8 readout chips and a single large sensor, bump bonded with Indium. The detector module covers a sensitive area of 4.5cm3.6cm with 60k pixels. Wire bonding are performed at the two long edges to PCB while at the short edges, two adjacent modules are closely butted with their guardrings for the least dead area. Signals and power supplies are provided through flexible PCBs to the backend readout board at the backside, so that two adjacent long edges can also be closely butted. This hybrid PCB was carefully designed, not only to achieve the least dead area, but also to achieve low noise, good head conductivity and assembly friendly.
The prototype system was grouped by six modules with 360k pixels in total, covering an area of 9cm*10cm. The data acquisition for the prototype is served with a single server, and each detector module communicates with the server through two 10Gb-Ethernet connections, achieving a full data rate of 862MB/s. A typical power dissipation of 2.2W for all the readout chips in each module, or 15W for all the front end part of the prototype system, is conducted through PCB to the Aluminum supporting. The full detector system consumes 60W at the full speed and can run without water cooling, making it easily portable.
A typical x-ray diffraction experiment at the synchrotron light was done with a standard powder sample CeO2. Normalized intensity of all the measure peaks together with their positions is given. Compared with a standard device, it shows that all the measured peak positions are closely agreed with each other. It also agrees with the theoretical predictions given the known lattice of the sample. The prototype system shows less FWHM of the peak due to the smaller pixel size, and good peak-to-valley ratios. X-ray images taken at X-ray tubes with flatfield correction and preliminary results of detector calibrations are also discussed.
