6-9 March 2017
Europe/Zurich timezone

Improved AM chip pattern recognition with optimized ternary bit usage

7 Mar 2017, 11:30


9 : Real Time Pattern Recognition


Stefan Schmitt (Deutsches Elektronen-Synchrotron (DE))


For the ATLAS Fast TracKer (FTK) hardware-based track reconstruction
system, the AM chip is used in the pattern recognition step. The
version of the AM chip used in the FTK is based on eight associative
memory cells per pattern, corresponding to eight detector planes. Patterns
are identified for addresses where seven out of the eight memory cells
indicate a matching hit. The associative memories each accept 15-bit
hit addresses for the look-up. Three of these bits are ternary, such
that the associative memory can be programmed at each address to
either match the bit exactly (B=0 or B=1) or to always match
(B=X). The use of ternary bits gives the possibility to tune the
resolution of the pattern match for each layer of each pattern
independetly, thus achieving better signal to noise in the pattern
match. In this talk, a fast and efficient method to optimize the use
of ternary bits is presented. It is based on limiting the number of
bits which have state X while the desired patterns are imported to the
AM chip. With respect to previously used methods improved data flow is
achieved at constant efficiency.

Primary author

William Panduro Vazquez (Royal Holloway, University of London)

Presentation Materials