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Radiation damage effects at High Luminosity LHC (HL-LHC) expected fluences (greater than 2×1016 n/cm2 1 MeV equivalent) and total ionising doses (TID) (greater than 1 Grad) will impose very stringent constraints in terms of radiation resistance of solid-state detectors.
TCAD tools can be used to study the electric behaviour of different design options, in order to optimize the performance of these detectors in terms of inter-electrode isolation and charge collection properties. A comprehensive modelling approach of the effects of radiation damage on electrical behaviour of silicon detectors at these very high fluences need therefore to be developed and validated over different technology options.
Aiming at the suitability of the approach, the proposed strategy is based on a combined bulk and surface damage effects modelling accounting for a limited number of measurable parameters. In this work, we concentrate in particular on the effects of surface damage on detectors fabricated on p-type substrates by three different vendors, combining these effects with those of bulk damage previously analysed [1]. Actually, starting from standard test structure measurements (i.e. MOS capacitors, gated diodes and MOSFETs), the interface trap state density (NIT) and the oxide charge (QOX) can be extracted for different vendors and used as input parameter to the simulation tools. Test structures under study include MOS capacitors, gated-diodes, fabricated both at Hamamatsu (Japan) and at Infineon (Austria), as well as MOS capacitors, gated-diodes and MOSFETs fabricated at FBK (Italy). Using High-Frequency (HF) and Quasi-Static (QS) C-V characteristics and current-voltage (I-V) measurements, the effective oxide charge density (NEFF), the surface generation velocity (s0) and the interface trap density (DIT) have been determined and compared for the three technologies before and after irradiation with X-rays with doses ranging from 0.05 to 20 Mrad(SiO2). The separate contributions to the threshold voltage shift due to the fixed oxide charge and the interface trapped charge in MOSFETs can be evaluated using the method proposed by McWhorter et al. [2]. A detailed simulation analysis, varying the previously mentioned parameters, has been carried out, aiming at evaluating the effects of oxide charge density and interface trap density variation with the dose on MOS capacitor capacitances, gated diode currents and interstrip resistance. The separate effects of different types of interface trap states has been considered as well, by singularly varying the total density of donor- and acceptor-type trap states. The effects of different trap energy distributions and capture cross sections have been evaluated within Synopsys Sentaurus TCAD device simulator by means of steady-state, AC and transient analyses. Comparisons have been carried out between simulation findings and available literature data, in particular in terms of charge collection efficiency versus fluence. The good agreement obtained would support the use of the model as a predictive tool to optimize the design and the operation of novel solid-state detectors in the HL-LHC scenario.
[1] F. Moscatelli, D. Passeri, G.M. Bilei, A. Morozzi, G.-F. Dalla Betta, R. Mendicino, “Combined Bulk and Surface Radiation Damage Effects at Very High Fluences in Silicon Detectors: Measurements and TCAD Simulations,” IEEE Trans. Nucl. Sci., vol. 63, no. 5, pp. 2716-2723, 2016.
[2] P. J. McWorther and P. S. Winokur, “Simple technique for separating the effects of interface traps and trapped-oxide charge in metal-oxide-semiconductor transistors,” Applied Physics Letters, vol. 48, pp. 113-135, 1986
