Performance of the CMS Phase 1 Pixel Detector

12 Dec 2017, 09:30
20m
Conference Center (Okinawa Institute of Science and Technology Graduate University (OIST))

Conference Center

Okinawa Institute of Science and Technology Graduate University (OIST)

OIST, Onna, Okinawa 904-0495, Japan
ORAL Large scale applications Session5

Speaker

Bora Akgun (CERN)

Description

It is anticipated that the LHC accelerator will reach and exceed the luminosity of L = 2 x10^34 cm^-2s^-1 during the LHC Run 2 period until 2023. At this higher luminosity and increased hit occupancies the Phase 0 CMS pixel detector would have been subjected to severe dead time and inefficiencies introduced by limited buffers in the analog read-out chip and effects of radiation damage in the sensors. Therefore a new pixel detector has been built and replaced the Phase 0 detector in the 2016/17 LHC extended year-end technical stop. The CMS Phase 1 pixel detector features four central barrel layers and three end-cap disks in forward and backward direction for robust tracking performance, and a significantly reduced overall material budget including new cooling and powering schemes. The design of the new front-end readout chip comprises larger data buffers, an increased transmission bandwidth, and low-threshold comparators. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. A new DAQ system has been developed based on a combination of custom and standard microTCA parts. This contribution gives an overview of the design and performance of the CMS phase 1 pixel detector.

Primary author

Presentation materials