Speaker
Description
Device fabrication is a key challenge in developing more complex superconducting detectors and cryogenic electronics. In order to explore new detector and circuit ideas, a high degree of flexibility in the fabrication process can permit new devices and design opportunities. However, this flexibility must be balanced by maintaining process stability in order to achieve high yield and develop a deeper understanding of the detailed interactions between design and the fabrication process. Two examples are highlighted, starting with a very simple, single superconducting material layer process for fabricating superconducting nanowire single photon detectors. This simple process is contrasted with a significantly more complex process for superconducting electronics involving nine planarized superconducting material layers, including a high-kinetic-inductance layer, and a resistive material layer. In addition to contrasting the fabrication process approaches used in both cases, some of the successful device and circuit demonstrations will be highlighted and opportunities for future developments will be described.
This work is supported by the Assistant Secretary of Defense for Research and Engineering and the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), via Air Force Contract FA872105C0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the ODNI, IARPA, or the U.S. Government. The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright annotation thereon.
