Speaker
Description
Yet Another Rapid Readout (YARR) is a DAQ system based on a software driven architecture using PCIe FPGA boards. It was designed for the readout of current generation ATLAS Pixel detector readout chips, which have a readout bandwidth of 160 Mb/s. YARR has been upgraded to accommodate the higher 5 Gb/s bandwidth of the next generation readout chip in development by the RD53 collaboration for the Phase-II upgrade of the ATLAS and CMS detectors. The performance results of the migration to a new PCIe FPGA board, the PLDA XpressK7, will be presented.
Summary
YARR utilises commercial-off-the-shelf PCIe FPGA cards as a reconfigurable I/O interface, which act as a simple gateway to pipe all data from Pixel detector modules via the high speed PCIe connection into the host system’s memory. All further data processing can be performed in software, which gives the advantages of high flexibility and being independent of specific hardware platforms. This readout architecture can directly interface with software emulators of Pixel detector readout chips. This greatly aids the software development as a software emulator removes the dependency on hardware availability and is also a great tool to reduce the threshold for new users to test the DAQ system. Furthermore, the emulator can be used to set up a test environment of the software package - a crucial feature to enable continuous integration and maintain a high quality of the software.
For the readout of the current generation Pixel detector readout chip, YARR uses the SPEC board which features a Xilinx Spartan 6 FPGA and a local PCIe bus bridge IC. To cope with the much higher bandwidth of the next generation readout chips, the newer Xilinx Series 7 FPGAs have to be used. Furthermore, to increase the portability of the firmware to a broader range of PCIe boards, the integrated PCIe endpoint will be used after migration instead of a local bus bridge. Results of the firmware migration of the XpressK7 card with a Xilinx Kintex 7 FPGA, including performance benchmarks of the scatter-gather DMA transfers, will be presented.
