Commissioning of ROD Boards for the Entire ATLAS Pixel Detector

13 Sept 2017, 16:30
1h 30m
Porter College Dining Hall (UCSC)

Porter College Dining Hall

UCSC

Board: B3
Poster Systems, Planning, Installation, Commissioning and Running Experience POSTER Session

Speaker

Prof. Alessandro Gabrielli (INFN and Physics and Astronomy Dep. University of Bologna)

Description

ATLAS Experiment has reworked and upgraded some systems during the 2014-2016 LHC shut down and the Pixel Detector has inserted an additional layer: the Insertable B-Layer. The layers 1 and 2 have been also upgraded, using the same BOC and ROD cards designed for IBL, while maintaining the detector unchanged. Now the efforts focus on the upgrade of the B-Layer and the Disks, again leaving the sensors untouched. Time plan is to commission the DAQ installation by the technical stop in 2018 while IBL, Layers 1 and 2 are working and able to take data using the new readout system.

Summary

The strategy for Insertable B-Layer (IBL) Readout-Driver (ROD) firmware development was three-fold: keeping as much of the Pixel ROD datapath firmware logic as possible, employing a complete new scheme of steering and calibration firmware and designing the overall system to prepare for a unified code version integrating IBL and Pixel layers. Essential features such as data formatting, frontend-specific error handling, and calibration are added to the ROD data path.
Along the recent years, after the ATLAS Pixel Detector IBL upgrade (14 ROD boards plus 1 for the Diamond Beam Monitor), also the Layer 2 and 1, which requires 26 plus 38 additional pairs of Back-of-Crate (BOC) and ROD cards, have been upgraded. For these two layers, in contrast with IBL, only the BOC and ROD readout chain has been updated while the sensors have been left unchanged. In fact, the boards originally designed for IBL can easily expand also the bandwidth of Pixel Layer 2 and 1 as long as we provide dedicated firmware to interface with the present detector and, in particular, with the FEI3 chips instead of the IBL FEI4 ASICs. The same approach used for upgrading the Layer 2 and 1 will be used to upgrade the BOC and ROD cards used in the Pixel Detector B-Layer and Disks. The B-Layer and Disks will be read out with the same firmware in use for the Layer 1, sharing the same modularity and clock speed. The additional production of 51 RODs, including the spares, has already been completed and the tests are on going. The plan is to have the readout upgrade of B-Layer and Disks commissioned by the technical stop in 2018. Thus, eventually, the entire Pixel Detector of ATLAS will share the same hardware readout chain, configured differently with specific firmware depending on the front-end sensors and modularity.

Primary author

Prof. Alessandro Gabrielli (INFN and Physics and Astronomy Dep. University of Bologna)

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