Effective thermal management of modern silicon detectors for HEP experiments is a challenging task. Although technological progresses on electronic chips allow for remarkable lowering of their specific power consumption at every new generation, the increasing request for performance and the very large number of sensing modules, concentrated in a confined volume in convoluted geometries,...
Since the beginning of the NA62 experiment, 9 silicon microchannel cooling plates have been integrated into GigaTracKer (GTK) modules. In 2014, the first module was installed in the NA62 beam line, pioneering the use of microfluidic devices for the thermal management of detectors in HEP experiments. In 2016, three fully functional GTK modules were installed in the and they were successfully...
The R&D program for a 65nm CMOS pixel chip of new generation for extremely high rate (3GHz/cm2) and very high radiation levels (1Grad) for ATLAS and CMS phase 2 pixel upgrades has taken place within the RD53 collaboration. Radiation test structures have been realized and characterized; building blocks and analog very front ends have been produced and tested. Small scale demonstrators with...
Flip chip processing of pixel detectors face many technological challenges when moving to finer CMOS technology nodes, production of 300 mm wafers and having larger chips than ever. In addition, finer pixel pitches and thinner CMOS chips are required, which will cause headache for the wafer bumping and assembly foundries. There will be fewer foundries, which are able provide all the required...
The Timepix chip is composed of a matrix of 256 x 256 square pixels at a pitch of 55um It can be programmed on a pixel-by-pixel basis to record particle arrival time, Time-over Threshold (ToT) or particle counts. This has made it a very versatile device and it has been used in the readout of various segmented semiconductor detectors, micro channel plates and different kinds of gas gain grid...
